NXP Semiconductors MKW01Z128, Reference Manual, Page: 700 / 884

RTC_CR field descriptions (continued)
Field Description
1
WPE
Wakeup Pin Enable
The wakeup pin is optional and not available on all devices.
0 Wakeup pin is disabled.
1 Wakeup pin is enabled and wakeup pin asserts if the RTC interrupt asserts or the wakeup pin is
turned on.
0
SWR
Software Reset
0 No effect.
1 Resets all RTC registers except for the SWR bit . The SWR bit is cleared by POR and by software
explicitly clearing it.
30.2.6 RTC Status Register (RTC_SR)
Address: 4003_D000h base + 14h offset = 4003_D014h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TCE
0 TAF TOF TIF
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
RTC_SR field descriptions
Field Description
31–5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4
TCE
Time Counter Enable
When time counter is disabled the TSR register and TPR register are writeable, but do not increment.
When time counter is enabled the TSR register and TPR register are not writeable, but increment.
0 Time counter is disabled.
1 Time counter is enabled.
3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
TAF
Time Alarm Flag
Time alarm flag is set when the TAR[TAR] equals the TSR[TSR] and the TSR[TSR] increments. This bit is
cleared by writing the TAR register.
Table continues on the next page...
Chapter 30 Real Time Clock (RTC)
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
Freescale Semiconductor, Inc. 569