tmp = tmp | mask // modify
mem[accessAddress & 0xE00FFFFF, size] = tmp // memory write
The cycle-by-cycle BME operations are detailed in the following table.
Table 13-6. Cycle definitions of decorated load: load-and-set 1-bit
Pipeline Stage
Cycle
x
x+1
x+2
BME AHB_ap
Forward addr to memory;
Decode decoration; Capture
address, attributes
Recirculate captured addr +
attr to memory as slave_wt
<next>
BME AHB_dp
<previous>
Perform memory read; Form
bit mask; Extract bit from
rdata; Form (rdata | mask)
and capture destination data
in register
Return extracted bit to master;
Perform write sending
registered data to memory
13.3.2.3 Decorated load unsigned bit field extract (UBFX)
This command extracts a bit field defined by LSB position (b) and the bit field width (w
+1) from the memory "container" defined by the access size associated with the load
instruction using a two-cycle read sequence.
The extracted bit field from the memory address is right-justified and zero-filled in the
operand returned to the core. Recall this is the only decorated operation that does not
perform a memory write, that is, UBFX only performs a read.
The data size is specified by the write operation and can be byte (8-bit), halfword (16-bit)
or word (32-bit). Note for the word sized operation, the maximum bit field width is 16
bits.
The use of a UBFX operation is recommended to extract a single bit. For this case, the w
field is simply set to 0, indicating a bit field width of 1.
ioubfxb 0 *
mem_addr
ioubfxh 0
mem_addr
ioubfxw 0
mem_addr
*
*
*
*
*
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
1
1
1
-
-
-
-
b
b
b
b
b
b
b
b
b
b
b
b
w
w
w
w
w
w
w
w
w
w
w
Figure 13-11. Decorated load address: unsigned bit field extract
See
, where addr[30:29] = 10 for peripheral, addr[28] = 1 specifies the
unsigned bit field extract operation, addr[27:23] is "b", the LSB identifier, addr[22:19] is
"w", the bit field width minus 1 identifier, and mem_addr[18:0] specifies the address
Functional description
MKW01Z128 MCU Reference Manual, Rev. 3, 04/2016
244
Freescale Semiconductor, Inc.
Summary of Contents for MKW01Z128
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Page 513: ...Interrupts MKW01Z128 MCU Reference Manual Rev 3 04 2016 382 Freescale Semiconductor Inc...
Page 633: ...CMP Trigger Mode MKW01Z128 MCU Reference Manual Rev 3 04 2016 502 Freescale Semiconductor Inc...