NXP Semiconductors MC9S12VRP64, Owner Reference Manual

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S12S Debug Module (S12DBGV2)
MC9S12VRP Family Reference Manual Rev. 1.3
NXP Semiconductors 203
6.3.2.6 Debug Count Register (DBGCNT)
Read: Anytime
Write: Never
Address: 0x0026
7 6 5 4 3 2 1 0
R TBF 0 CNT
W
Reset
POR
—
0
—
0
—
0
—
0
—
0
—
0
—
0
—
0
= Unimplemented or Reserved
Figure 6-8. Debug Count Register (DBGCNT)
Table 6-12. DBGCNT Field Descriptions
Field Description
7
TBF
Trace Buffer Full — The TBF bit indicates that the trace buffer has stored 64 or more lines of data since it was
last armed. If this bit is set, then all 64 lines will be valid data, regardless of the value of DBGCNT bits. The TBF
bit is cleared when ARM in DBGC1 is written to a one. The TBF is cleared by the power on reset initialization.
Other system generated resets have no affect on this bit
This bit is also visible at DBGSR[7]
5–0
CNT[5:0]
Count Value — The CNT bits indicate the number of valid data 20-bit data lines stored in the Trace Buffer.
Table 6-13 shows the correlation between the CNT bits and the number of valid data lines in the Trace Buffer.
When the CNT rolls over to zero, the TBF bit in DBGSR is set and incrementing of CNT will continue in
end-trigger mode. The DBGCNT register is cleared when ARM in DBGC1 is written to a one. The DBGCNT
register is cleared by power-on-reset initialization but is not cleared by other system resets. Thus should a reset
occur during a debug session, the DBGCNT register still indicates after the reset, the number of valid trace buffer
entries stored before the reset occurred. The DBGCNT register is not decremented when reading from the trace
buffer.
Table 6-13. CNT Decoding Table
TBF CNT[5:0] Description
0 000000 No data valid
0 000001
000010
000100
000110
..
111111
1 line valid
2 lines valid
4 lines valid
6 lines valid
..
63 lines valid
1 000000 64 lines valid; if using Begin trigger alignment,
ARM bit will be cleared and the tracing session ends.
1 000001
..
..
111110
64 lines valid,
oldest data has been overwritten by most recent data