NXP Semiconductors MC9S08LG16, Reference Manual

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Chapter 3 Modes of Operation
MC9S08LG32 MCU Series, Rev. 5
48 Freescale Semiconductor
3.7.1 On-Chip Peripheral Modules in Stop Modes
When the MCU enters any stop mode, system clocks to the internal peripheral modules are stopped. Even
in the exception case (ENBDM = 1), where clocks to the background debug logic continue to operate,
clocks to the peripheral systems are halted to reduce power consumption. Refer to
Section 3.6.1, “Stop2
Mode ,” and Section 3.6.2, “Stop3 Mode ,” for specific information on system behavior in stop modes.
Table 3-4. Stop and Low Power Mode Behavior
Peripheral
Mode
Stop2 Stop3
CPU Off Standby
RAM Standby Standby
FLASH Off Standby
Port I/O Registers Off Standby
ADC Off Optionally On
1
1
Requires the asynchronous ADC clock. For stop3, LVD must be enabled to
run in stop if converting the bandgap channel.
BDM Off
2
2
If ENBDM is set when entering stop2, the MCU will actually enter stop3.
Optionally On
COP Off Off
ICS Off Optionally On
3
3
IRCLKEN and IREFSTEN set in ICSC1, else in standby.
IIC Off Standby
IRQ Wake Up Optionally On
KBI Off Optionally On
LVD/LVW Off
4
4
If LVDSE is set when entering stop2, the MCU will actually enter stop3.
Optionally On
LCD Optionally On Optionally On
MTIM Off Optionally On
SCIx Off Standby
SPI Off Standby
RTC Optionally On Optionally On
TPMx Off Standby
Voltage Regulator Partial Powerdown Optionally On
5
5
Requires the LVD to be enabled, else in standby. See Section 3.6.4, “LVD
Enabled in Stop Mode ”.
XOSC Optionally On
6
6
ERCLKEN and EREFSTEN set in ICSC2, else in standby.
Optionally On
6
I/O Pins States Held Peripheral Control