NXP Semiconductors LPC84x, User Manual

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UM11029 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
User manual Rev. 1.0 — 16 June 2017 92 of 515
NXP Semiconductors
UM11029
Chapter 8: LPC84x System configuration (SYSCON)
8.6.6 FRO oscillator control register
The FROOSCCTRL register can be used to select direct fro_oscout (30 MHz, 24 MHz,
18 MHz) or select divided fro_oscout (1.125 MHz, 1.5 MHz, 1.875 MHz, 9 MHz, 12 MHz,
or 15 MHz) based on FAIM low power boot value.
The set_fro_frequency API call ( Chapter 9 “LPC84x FRO API ROM routine” ) must be
used to select desired output frequency from FRO. See Figure 9 “UM11029 clock
generation (continued)” .
8.6.7 FRO direct clock source update register
The FRODIRECTCLKUEN register updates the clock source of the FRO clock with the
new input clock after the FROOSCCTRL register bit 17 has been written to. In order for
the update to take effect, first write a zero to the FRODIRECTCLKUEN register and then
write a one to FRODIRECTCLKUEN.
Table 131. FRO oscillator control register (FROOSCCTRL, address 0x4004 8028) bit description
Bit Symbol Value Description Reset
value
16:0 - Reserved 0
17 FRO_DIRECT FRO direct clock select 0
0
fro_oscout
is divided by 2 (normal boot) or 16 (low power
boot), depending on FAIM low power boot value. See
Section 4.2.1 “FAIM bit definitions” .
1 FRO clock is direct from FRO oscillator
31:18 - - Reserved -
Table 132. FRO direct clock source update enable register (FRODIRECTCLKUEN, address 0x4004 8030) bit
description
Bit Symbol Value Description Reset
value
0 ENA Enable FRO clock source update. 0
0 No change
1 Update clock source
31:1 - - Reserved -