UM11029
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
296 of 515
NXP Semiconductors
UM11029
Chapter 17: LPC84x USART0/1/2/3/4
[1]
RO = Read-only, W1 = write 1 to clear.
3
TXIDLE
Transmitter Idle. When 0, indicates that the transmitter is currently in the
process of sending data.When 1, indicate that the transmitter is not currently
in the process of sending data.
1
RO
4
CTS
This bit reflects the current state of the CTS signal, regardless of the setting of
the CTSEN bit in the CFG register. This will be the value of the CTS input pin
unless loopback mode is enabled.
NA
RO
5
DELTACTS
This bit is set when a change in the state is detected for the CTS flag above.
This bit is cleared by software.
0
W1
6
TXDISSTAT
Transmitter Disabled Interrupt flag. When 1, this bit indicates that the USART
transmitter is fully idle after being disabled via the TXDIS in the CTL register
(TXDIS = 1).
0
RO
7
-
Reserved. Read value is undefined, only zero should be written.
NA
NA
8
OVERRUNINT
Overrun Error interrupt flag. This flag is set when a new character is received
while the receiver buffer is still in use. If this occurs, the newly received
character in the shift register is lost.
0
W1
9
-
Reserved. Read value is undefined, only zero should be written.
NA
NA
10
RXBRK
Received Break. This bit reflects the current state of the receiver break
detection logic. It is set when the Un_RXD pin remains low for 16 bit times.
Note that FRAMERRINT will also be set when this condition occurs because
the stop bit(s) for the character would be missing. RXBRK is cleared when the
Un_RXD pin goes high.
0
RO
11
DELTARXBRK
This bit is set when a change in the state of receiver break detection occurs.
Cleared by software.
0
W1
12
START
This bit is set when a start is detected on the receiver input. Its purpose is
primarily to allow wake-up from deep-sleep or power-down mode immediately
when a start is detected. Cleared by software.
0
W1
13
FRAMERRINT
Framing Error interrupt flag. This flag is set when a character is received with
a missing stop bit at the expected location. This could be an indication of a
baud rate or configuration mismatch with the transmitting source.
0
W1
14
PARITYERRINT
Parity Error interrupt flag. This flag is set when a parity error is detected in a
received character..
0
W1
15
RXNOISEINT
Received Noise interrupt flag. Three samples of received data are taken in
order to determine the value of each received data bit, except in synchronous
mode. This acts as a noise filter if one sample disagrees. This flag is set when
a received data bit contains one disagreeing sample. This could indicate line
noise, a baud rate or character format mismatch, or loss of synchronization
during data reception.
0
W1
16
ABERR
Autobaud Error. An autobaud error can occur if the BRG counts to its limit
before the end of the start bit that is being measured, essentially an autobaud
time-out.
0
W1
31:17 -
Reserved. Read value is undefined, only zero should be written.
NA
NA
Table 325. USART Status register (STAT, address 0x4006 4008 (USART0), 0x4006 8008 (USART1), 0x4006 C008
(USART2), 0x4007 0008 (USART3), 0x4007 4008 (USART4)) bit description
Bit
Symbol
Description
Reset
value
Access
[1]
