NXP Semiconductors LPC845, User Manual, Page: 4 / 13

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User Manual Rev. 1.0 — 27 November 2017 4 of 12
NXP Semiconductors
LPC845 Capacitive Touch Kit
User Manual
Table 1 below shows the layout of the MP board, indicating location of jumpers, buttons,
connectors/expansion options and MCU devices.
Fig 2. MP board layout (top silkscreen)
P10
P1
P3 P2
P11
P8
P7
P5
J3
P6
P9
S2
WAKE
S3
ISP
D1
D9
D10
D8
S1
RESET
P4
J4
Table 1. Jumpers and connectors
Circuit reference Description Reference section
J3 External SWD debug connector for LPC845
[4.1]
J4 USB connector for debug probe / board power
[4]
J5 External SWD debug connector for LPC11U35 (not installed, would be
mounted on underside of PCB.)
[4]
P1 P1 is not normally installed during production. After removing R6 (which is
a zero ohm resistor in parallel with P1), the VDD supply to the LPC845
can be isolated from that to other devices on the board. n/a