UM10503
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User manual
Rev. 2.1 — 10 December 2015
1007 of 1441
NXP Semiconductors
UM10503
Chapter 31: LPC43xx/LPC43Sxx State Configurable Timer (SCT) with
[1]
See
for selecting the dither pattern.
31.3.22 SCT capture registers 0 to 15 (REGMODEn bit = 1)
These registers allow software to read the counter values at which the event selected by
the corresponding Capture Control registers occurred.
31.3.23 SCT match reload registers 0 to 15 (REGMODEn bit = 0)
A Match register (L, H, or unified 32-bit) is loaded from the corresponding Reload register
when BIDIR is 0 and the counter reaches its limit condition, or when BIDIR is 1 and the
counter reaches 0.
Table 768. SCT fractional match registers 0 to 5 (FRACMAT[0:5], address 0x4000 0140
(FRACMAT0) to 0x4000 40154 (FRACMAT5)) bit description
Bit
Symbol
Description
Reset
value
3:0
FRACMAT_L
When UNIFY = 0, read or write the 4-bit value specifying the
dither pattern to be applied to the corresponding MATCHn_L
register (n = 0 to 5). When UNIFY = 1, the value applies to the
unified, 32-bit fractional match register.
0
15:4
-
Reserved.
-
19:16
FRACMAT_H
When UNIFY = 0, read or write 4-bit value specifying the dither
pattern to be applied to the corresponding MATCHn_H register
(n = 0 to 5).
0
31:20
-
Reserved.
-
Table 769. SCT capture registers 0 to 15 (CAP[0:15], address 0x4000 0100 (CAP0) to 0x4000
013C (CAP15)) bit description (REGMODEn bit = 1)
Bit
Symbol
Description
Reset
value
15:0
CAP_L
When UNIFY = 0, read the 16-bit counter value at which this
register was last captured. When UNIFY = 1, read the lower 16 bits
of the 32-bit value at which this register was last captured.
0
31:16
CAP_H
When UNIFY = 0, read the 16-bit counter value at which this
register was last captured. When UNIFY = 1, read the upper 16 bits
of the 32-bit value at which this register was last captured.
0
Table 770. SCT match reload registers 0 to 15 (MATCHREL[0:15], address 0x4000 0200
(MATCHREL0) to 0x4000 023C (MATCHREL15) bit description (REGMODEn bit =
0)
Bit
Symbol
Description
Reset
value
15:0
RELOAD_L
When UNIFY = 0, read or write the 16-bit value to be loaded into
the MATCHn_L register. When UNIFY = 1, read or write the lower
16 bits of the 32-bit value to be loaded into the MATCHn register.
0
31:16 RELOAD_H
When UNIFY = 0, read or write the 16-bit to be loaded into the
MATCHn_H register. When UNIFY = 1, read or write the upper 16
bits of the 32-bit value to be loaded into the MATCHn register.
0
