NXP Semiconductors LPC1751, User Manual, Page: 573 / 808

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UM10360_0 © NXP B.V. 2009. All rights reserved.
User manual Rev. 00.06 — 5 June 2009 573 of 808
NXP Semiconductors
UM10360
Chapter 31: LPC17xx General Purpose DMA (GPDMA) controller
5.11 DMA Software Last Burst Request register (DMACSoftLBReq - 0x5000
4028)
The DMACSoftLBReq Register is read/write and enables DMA last burst requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last burst DMA
transfers. A request can be generated from either a peripheral or the software request
register.
Table 31–537 shows the bit assignments of the DMACSoftLBReq Register.
5.12 DMA Software Last Single Request register (DMACSoftLSReq -
0x5000 402C)
The DMACSoftLSReq Register is read/write and enables DMA last single requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Reading the register indicates which sources are requesting last single DMA
transfers. A request can be generated from either a peripheral or the software request
register.
Table 31–538 shows the bit assignments of the DMACSoftLSReq Register.
5.13 DMA Configuration register (DMACConfig - 0x5000 4030)
The DMACConfig Register is read/write and configures the operation of the DMA
Controller. The endianness of the AHB master interface can be altered by writing to the M
bit of this register. The AHB master interface is set to little-endian mode on reset.
Table 31–539 shows the bit assignments of the DMACConfig Register.
Table 537. DMA Software Last Burst Request register (DMACSoftLBReq - 0x5000 4028)
Bit Name Function
15:0 SoftLBReq Software last burst request flags for each of 16 possible sources. Each bit represents
one DMA request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA last burst request for the corresponding request line.
31:16 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Table 538. DMA Software Last Single Request register (DMACSoftLSReq - 0x5000 402C)
Bit Name Function
15:0 SoftLSReq Software last single transfer request flags for each of 16 possible sources. Each bit
represents one DMA request line or peripheral function:
0 - writing 0 has no effect.
1 - writing 1 generates a DMA last single transfer request for the corresponding
request line.
31:16 - Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.