NXP Semiconductors Kinetis KE1xZ256, Reference Manual

Page: 1073 / 1325

RTC_TCR field descriptions (continued)
Field Description
Current value used by the compensation logic for the present second interval. Updated once a second if
the CIC equals 0 with the contents of the TCR field. If the CIC does not equal zero then it is loaded with
zero (compensation is not enabled for that second increment).
15–8
CIR
Compensation Interval Register
Configures the compensation interval in seconds from 1 to 256 to control how frequently the TCR should
adjust the number of 32.768 kHz cycles in each second. The value written should be one less than the
number of seconds. For example, write zero to configure for a compensation interval of one second. This
register is double buffered and writes do not take affect until the end of the current compensation interval.
TCR Time Compensation Register
Configures the number of 32.768 kHz clock cycles in each second. This register is double buffered and
writes do not take affect until the end of the current compensation interval.
80h Time Prescaler Register overflows every 32896 clock cycles.
... ...
FFh Time Prescaler Register overflows every 32769 clock cycles.
00h
Time Prescaler Register overflows every 32768 clock cycles.
01h Time Prescaler Register overflows every 32767 clock cycles.
.... ...
7Fh Time Prescaler Register overflows every 32641 clock cycles.
Chapter 43 Real Time Clock (SRTC)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1073