NXP Semiconductors Kinetis KE1xZ256, Reference Manual

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Each timer channel can be configured to run independently and made to work in either
compare or capture modes. In compare mode, the timers decrement when enabled and
generate an output pre-trigger and timeout pulse. The trigger output is 1 clock cycle
delayed of the pre-trigger pulse. Each timer channel start, reload and restart can be
controlled via control bits. The timer can be configured to always decrement, or
decrement on selected trigger inputs or previous channel timeout (when channels are
chained). By chaining timer channels, applications can achieve larger timeout durations.
In capture mode, the timer can be used to perform measurements as the timer value is
captured (in the timer value register) when a selected trigger input is asserted. In capture
mode, the timer can support once-off or multiple measurements (for example, frequency
measurements).
The timer channels operate on an asynchronous clock, which is independent from the
register read/write access clock. Clock synchronization between the clock domains
ensures normal operations.
Chapter 40 Low-power Periodic Interrupt Timer (LPIT)
Kinetis KE1xZ256 Sub-Family Reference Manual, Rev. 3, 07/2018
NXP Semiconductors 1011