NXP Semiconductors KE1xF Series, Reference Manual, Page: 998 / 1483

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CH7TRIG CH6TRIG
TRIGF
INITTRIGEN
CH1TRIG CH0TRIG CH5TRIG CH4TRIG CH3TRIG CH2TRIG
W
0
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_EXTTRIG field descriptions
Field Description
31–10
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
9
CH7TRIG
Channel 7 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
8
CH6TRIG
Channel 6 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
7
TRIGF
Channel Trigger Flag
Set by hardware when a channel trigger is generated. Clear TRIGF by reading EXTTRIG while TRIGF is
set and then writing a 0 to TRIGF. Writing a 1 to TRIGF has no effect.
If another channel trigger is generated before the clearing sequence is completed, the sequence is reset
so TRIGF remains set after the clear sequence is completed for the earlier TRIGF.
0 No channel trigger was generated.
1 A channel trigger was generated.
6
INITTRIGEN
Initialization Trigger Enable
Enables the generation of the trigger when the FTM counter is equal to the CNTIN register.
0 The generation of initialization trigger is disabled.
1 The generation of initialization trigger is enabled.
5
CH1TRIG
Channel 1 Trigger Enable
Table continues on the next page...
Memory map and register definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
998 NXP Semiconductors