NXP Semiconductors KE1xF Series, Reference Manual, Page: 461 / 1483

SCG_HCCR field descriptions (continued)
Field Description
0011 Divide-by-4
0100 Divide-by-5
0101 Divide-by-6
0110 Divide-by-7
0111 Divide-by-8
1000 Reserved
1001 Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 Reserved
1111 Reserved
19.3.7 SCG CLKOUT Configuration Register (SCG_CLKOUTCNFG)
This register controls which SCG clock source is selected to be ported out to the
CLKOUT pin.
Address: 4006_4000h base + 20h offset = 4006_4020h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CLKOUTSEL
0
W
Reset
0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SCG_CLKOUTCNFG field descriptions
Field Description
31–28
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
27–24
CLKOUTSEL
SCG Clkout Select
Selects the SCG system clock.
0000 SCG SLOW Clock
0001 System OSC (SOSC_CLK)
0010 Slow IRC (SIRC_CLK)
0011 Fast IRC (FIRC_CLK)
0100 Reserved
0101 Reserved
0110 System PLL (SPLL_CLK)
0111 Reserved
1111 Reserved
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.
Chapter 19 System Clock Generator (SCG)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 461