
Table 17-11. Margin Level Choices for Read 1s Section
Read Margin Choice
Margin Level Description
0x00
Use the 'normal' read level for 1s
0x01
Apply the 'User' margin to the normal read-1 level
0x02
Apply the 'Factory' margin to the normal read-1 level
Table 17-12. Read 1s Section Command Error Handling
Error Condition
Error Bit
Command not available in current mode/security
FSTAT[ACCERR]
An invalid margin code is supplied
FSTAT[ACCERR]
An invalid flash address is supplied
FSTAT[ACCERR]
Flash address is not 128-bit aligned for program flash, 64-bit aligned for data flash
FSTAT[ACCERR]
The requested section crosses a flash block boundary
FSTAT[ACCERR]
The requested number of double-phrases for program flash, phrases for data flash is zero
FSTAT[ACCERR]
Read-1s fails
FSTAT[MGSTAT0]
17.5.11.3 Program Check command
The Program Check command tests a previously programmed program flash or data flash
longword to see if it reads correctly at the specified margin level.
Table 17-13. Program Check Command FCCOB Requirements
FCCOB Number
FCCOB Contents [7:0]
0
0x02 (PGMCHK)
1
Flash address [23:16]
2
Flash address [15:8]
3
4
Margin Choice
8
Byte 0 expected data
9
Byte 1 expected data
A
Byte 2 expected data
B
Byte 3 expected data
1. Must be longword aligned (Flash address [1:0] = 00).
Upon clearing CCIF to launch the Program Check command, the FTFE sets the read
margin for 1s based on the provided margin choice according to
. The
Program Check operation then reads the specified longword, and compares the actual
read data to the expected data provided by the FCCOB. If the comparison at margin-1
fails, the MGSTAT0 bit is set.
Chapter 17 Flash Memory Module (FTFE)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors
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Summary of Contents for KE1xF Series
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