NXP Semiconductors KE1xF Series, Reference Manual, Page: 375 / 1483

FTFE_FSTAT field descriptions (continued)
Field Description
The FPVIOL error bit indicates an attempt was made to program or erase an address in a protected area
of program flash or data flash memory during a command write sequence or a write was attempted to a
protected area of the FlexRAM while enabled for EEPROM. While FPVIOL is set, the CCIF flag cannot be
cleared to launch a command. The FPVIOL bit is cleared by writing a 1 to FPVIOL while CCIF is set.
Writing a 0 to the FPVIOL bit has no effect.
0 No protection violation detected
1 Protection violation detected
3–1
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
0
MGSTAT0
Memory Controller Command Completion Status Flag
The MGSTAT0 status flag is set if an error is detected during execution of an FTFE command or during
the flash reset sequence. As a status flag, this bit cannot (and need not) be cleared by the user like the
other error flags in this register.
The value of the MGSTAT0 bit for "command-N" is valid only at the end of the "command-N" execution
when CCIF=1 and before the next command has been launched. At some point during the execution of
"command-N+1," the previous result is discarded and any previous error is cleared.
17.4.4.2 Flash Configuration Register (FTFE_FCNFG)
This register provides information on the current functional state of the FTFE module.
The erase control bits (ERSAREQ and ERSSUSP) have write restrictions. PFLSH,
RAMRDY, and EEERDY are read-only status bits. The reset values for the PFLSH,
RAMRDY, and EEERDY bits are determined during the reset sequence.
Address: 4002_0000h base + 1h offset = 4002_0001h
Bit 7 6 5 4 3 2 1 0
Read
CCIE RDCOLLIE
ERSAREQ
ERSSUSP
0 PFLSH RAMRDY EEERDY
Write
Reset
0 0 0 0 0 0 0 0
FTFE_FCNFG field descriptions
Field Description
7
CCIE
Command Complete Interrupt Enable
The CCIE bit controls interrupt generation when an FTFE command completes.
0 Command complete interrupt disabled
1 Command complete interrupt enabled. An interrupt request is generated whenever the FSTAT[CCIF]
flag is set.
6
RDCOLLIE
Read Collision Error Interrupt Enable
The RDCOLLIE bit controls interrupt generation when an FTFE read collision error occurs.
Table continues on the next page...
Chapter 17 Flash Memory Module (FTFE)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 375