NXP Semiconductors KE1xF Series, Reference Manual, Page: 1314 / 1483

48.3.1.12.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R 0
TXEM
PT
RXE
MPT
0 TXOF RXUF
W w1c w1c
Reset
0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0 0 0
RXIDEN
TXOF
E
RXUF
E
TXFE
TXFIFOSIZE
RXFE
RXFIFOSIZE
W
TXFL
USH
RXFL
USH
Reset
0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1
48.3.1.12.4 Fields
Field Function
31-24
—
Reserved
23
TXEMPT
Transmit Buffer/FIFO Empty
Asserts when there is no data in the Transmit FIFO/buffer. This field does not take into account data that
is in the transmit shift register.
0 - Transmit buffer is not empty.
1 - Transmit buffer is empty.
22
RXEMPT
Receive Buffer/FIFO Empty
Asserts when there is no data in the receive FIFO/Buffer. This field does not take into account data that is
in the receive shift register.
0 - Receive buffer is not empty.
1 - Receive buffer is empty.
21-18
—
Reserved
17
TXOF
Transmitter Buffer Overflow Flag
Indicates that more data has been written to the transmit buffer than it can hold. This field will assert
regardless of the value of TXOFE. However, an interrupt will be issued to the host only if TXOFE is set.
This flag is cleared by writing a 1.
0 - No transmit buffer overflow has occurred since the last time the flag was cleared.
1 - At least one transmit buffer overflow has occurred since the last time the flag was cleared.
16
RXUF
Receiver Buffer Underflow Flag
Indicates that more data has been read from the receive buffer than was present. This field will assert
regardless of the value of RXUFE. However, an interrupt will be issued to the host only if RXUFE is set.
This flag is cleared by writing a 1.
0 - No receive buffer underflow has occurred since the last time the flag was cleared.
1 - At least one receive buffer underflow has occurred since the last time the flag was cleared.
15 Transmit FIFO/Buffer Flush
Table continues on the next page...
Register definition
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1314 NXP Semiconductors