NXP Semiconductors KE1xF Series, Reference Manual, Page: 1067 / 1483

Note that the ELSB:ELSA bits value should be considered because they define the active
state of the channels outputs. In Low-True (ELSB:ELSA = X:1) Combine mode, the
channel (n) output is forced high at the beginning of the period, forced low at the channel
(n) match and forced high at the channel (n+1) match. When inverting is selected, the
channels (n) and (n+1) present waveforms as shown in the following figure.
NOTE
channel (n+1) match
FTM counter
channel (n) match
channel (n+1) output
before the inverting
write 1 to INV(m) bit
INV(m) bit buffer
INVCTRL register
synchronization
INV(m) bit
channel (n) output
after the inverting
channel (n+1) output
after the inverting
INV(m) bit selects the inverting to the pair channels (n) and (n+1).
channel (n) output
before the inverting
Figure 41-64. Channels (n) and (n+1) outputs after the inverting in Low-True
(ELSB:ELSA = X:1) Combine mode
NOTE
The Inverting is not available in Output Compare mode .
41.5.14 Software Output Control Mode
The software output control forces the channel output according to software defined
values at a specific time in the PWM generation.
The software output control is selected when:
• QUADEN = 0
• DECAPEN = 0, and
• CH(n)OC = 1
Chapter 41 FlexTimer Module (FTM)
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
NXP Semiconductors 1067