NXP Semiconductors KE1xF Series, Reference Manual, Page: 1034 / 1483

41.5.5.2 FTM Counter Reset in Input Capture Mode
If the channel (n) is in input capture mode and CnSC[ICRST = 1], then when the selected
input capture event occurs in the channel (n) input signal, the current value of the FTM
counter is captured into the CnV register, the CHF bit is set, the channel (n) interrupt is
generated (if CHIE = 1) and the FTM counter is reset to the CNTIN register value.
This allows the FTM to measure a period/pulse being applied to the channel (n) input
(number of the FTM input clocks) without having to implement a subtraction calculation
in software subsequent to the event occurring.
The figure below shows the FTM counter reset when the selected input capture event is
detected in a channel in input capture mode with ICRST = 1.
FTM input clock
CNT
channel (n) input
CHF bit
C(n)V XX
0x27
selected channel (n) input event: rising edge
NOTE
Channel (n) input after its synchronizer and filter
MOD = 0xFFFF
CNTIN = 0x0000
PS[2:0] = 3'b000
ICRST = 1'b1
...
0x27
...
0x00 0x01 0x02 0x03 0x26 0x25 0x24 0x23 0x22 0x21 0x20
Figure 41-14. Example of the Input Capture mode with ICRST = 1
NOTE
• It is expected that the ICRST bit be set only when the channel is in input capture
mode.
• If the FTM counter is reset because the channel is in input capture mode with ICRST
= 1, then the prescaler counter ( Prescaler ) is also reset.
41.5.6 Output Compare mode
The Output Compare mode is selected when:
• DECAPEN = 0
• COMBINE = 0
Functional description
Kinetis KE1xF Sub-Family Reference Manual, Rev. 4, 06/2019
1034 NXP Semiconductors