TSI software configurations
KE15Z Touch Sensing Interface, User's Guide, Rev. 0, 12/2016
8
NXP Semiconductors
Example of the configurations for the self-capacitive mode
3.1.1. Clock generation
The clock generation determines the TSI scan speed.
The TSI module is clocked by the main clock, which is generated by TSI module itself without any
other external clock source. The main clock has four ranges of frequency, and can be divided into the
switching clock which is used to control the ph1/ph2 switching speed (SwitchingClock), and finally
determines the whole scan time, as showing in the figure below.
Block Diagram of Clock Generation
When SSC_MODE=10b, then the switching clock is divided from main clock directly, as the basic
clock generation;
When SSC_MODE=00b/01b, then the switching clock is generated from SSC module, as the advanced
clock generation.
3.1.1.1. Basic clock generation
Attached below is the formula of the basic clock generation, when TSI_SSC0[SSC_MODE] = 10b.
SwitchingClock =
𝑀𝑎𝑖𝑛𝐶𝑙𝑜𝑐𝑘
𝐷𝑖𝑣𝑖𝑑𝑒𝑟
Main clock setting
Setting: Main Clock
Register
Value
Main Clock(MHz)
TSI_MODE[SETCLK]
00
20.72
01
16.65
10
13.87
11
11.91
