NXP Semiconductors K32 L2A Series, Reference Manual, Page: 985 / 1379

NOTE
LVWV is reset solely on a POR Only event. The other fields of
the register are reset on Chip Reset Not VLLS. For more
information about these reset types, refer to the Reset section
details.
Address: 4007_D000h base + Ch offset = 4007_D00Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
LVWF
0
LVWIE
0
LVWV
W
LVWACK
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PMC_LVDSC2 field descriptions
Field Description
31–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
LVWF
Low-Voltage Warning Flag
This read-only status field indicates a low-voltage warning event. LVWF is set when V
Supply
transitions
below the trip point, or after reset and V
Supply
is already below V
LVW
. LVWF may be 1 after power-on reset,
therefore, to use LVW interrupt function, before enabling LVWIE, LVWF must be cleared by writing
LVWACK first.
0 Low-voltage warning event not detected
1 Low-voltage warning event detected
6
LVWACK
Low-Voltage Warning Acknowledge
Table continues on the next page...
Chapter 37 Power Management Controller (PMC)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 985