NXP Semiconductors K32 L2A Series, Reference Manual, Page: 681 / 1379

26.3.7 LLWU Pin Flag register (LLWU_PF)
LLWU_PF contains the wakeup flags indicating which wakeup source caused the MCU
to exit LLS or VLLS mode. For LLS, this is the source causing the CPU interrupt flow.
For VLLS, this is the source causing the MCU reset flow.
The external wakeup flags are read-only and clearing a flag is accomplished by a write of
a 1 to the corresponding WUFx bit. The wakeup flag (WUFx), if set, will remain set if
the associated WUPEx bit is cleared.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the
Introduction details for more information.
Address: 4006_1000h base + 20h offset = 4006_1020h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
WUF31 WUF30 WUF29 WUF28 WUF27 WUF26 WUF25 WUF24 WUF23 WUF22 WUF21 WUF20 WUF19 WUF18 WUF17 WUF16
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
WUF15 WUF14 WUF13 WUF12 WUF11 WUF10
WUF9 WUF8 WUF7 WUF6 WUF5 WUF4 WUF3 WUF2 WUF1 WUF0
W w1c w1c w1c w1c w1c w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LLWU_PF field descriptions
Field Description
31
WUF31
Wakeup Flag For LLWU_P31
Indicates that an enabled external wakeup pin was a source of exiting a low-leakage power mode. To
clear the flag write a one to WUF31.
0 LLWU_P31 input was not a wakeup source
1 LLWU_P31 input was a wakeup source
Table continues on the next page...
Chapter 26 Low-Leakage Wakeup Unit (LLWU)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 681