NXP Semiconductors K32 L2A Series, Reference Manual, Page: 68 / 1379

The CAU clock source is the CPU/platform clock.
Analog
3.7.1 16-bit SAR ADC configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal
multiplexing
Module signals
Register
access
16-bit SAR ADC
Peripheral bus
controller 0
Other
peripherals
Figure 3-6. 16-bit SAR ADC configuration
Table 3-12. Reference links to related information
Topic Related module Reference
Full description 16-bit SAR ADC 16-bit SAR ADC
System memory map — System memory map
Clocking — Clock distribution
Power management — Power management
Signal multiplexing Port control Signal multiplexing
3.7.1.1 ADC instantiation information
This device contains one 16-bit successive approximation ADC with up to ~30 to 38
channels.
The ADC supports both software and hardware triggers.
The number of ADC channels present on the device is determined by the pinout of the
specific device package.
3.7
Analog
K32 L2A Reference Manual, Rev. 2, 01/2020
68 NXP Semiconductors