NXP Semiconductors K32 L2A Series, Reference Manual, Page: 564 / 1379

22.2.1.24.2 Function
.
22.2.1.24.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
SHIFTBUFHWS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
SHIFTBUFHWS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
22.2.1.24.4 Fields
Field Function
31-0
SHIFTBUFHWS
Shift Buffer
Alias to SHIFTBUF register, except reads/writes to this register are half word swapped. Reads return
{ SHIFTBUF[15:0], SHIFTBUF[31:24] }.
22.2.1.25 Shifter Buffer N Nibble Swapped (SHIFTBUFNISa)
22.2.1.25.1 Address
Register Offset
SHIFTBUFNIS0 400CA780h
SHIFTBUFNIS1 400CA784h
SHIFTBUFNIS2 400CA788h
SHIFTBUFNIS3 400CA78Ch
SHIFTBUFNIS4 400CA790h
SHIFTBUFNIS5 400CA794h
SHIFTBUFNIS6 400CA798h
SHIFTBUFNIS7 400CA79Ch
Memory Map and Registers
K32 L2A Reference Manual, Rev. 2, 01/2020
564 NXP Semiconductors