NXP Semiconductors K32 L2A Series, Reference Manual, Page: 496 / 1379

21.5.7 Receiver Threshold Register (EMVSIMx_RX_THD)
Address: 4004_E000h base + 18h offset = 4004_E018h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
RNCK_THD Reserved RDT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
EMVSIMx_RX_THD field descriptions
Field Description
31–12
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
11–8
RNCK_THD
Receiver NACK Threshold Value
Used to specify the number of consecutive NACK’s transmitted by the EMV SIM module, for a given
character, before the receive threshold error (RTE) flag is triggered. A value of 0 indicates that RTE is
never set. When a valid character is received by the EMV SIM, the internal counter keeping track of the
NACK count resets to zero for the subsequent byte being received. If the ANACK bit is clear in the CNTL
register, RNCK_THD has no effect.
0 Zero Threshold. RTE will not be set
>0 RTE will set after programmed value of NACKs are received
7–4
Reserved
This field is reserved.
RDT Receiver Data Threshold Value
Determines the number of bytes that must exist in the Receive FIFO to trigger the receive data threshold
interrupt flag (RDTF). Value must not exceed the total bytes that can be stored in the Receive FIFO.
21.5.8 Transmitter Threshold Register (EMVSIMx_TX_THD)
Address: 4004_E000h base + 1Ch offset = 4004_E01Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TNCK_THD
0
TDT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
EMVSIMx_TX_THD field descriptions
Field Description
31–12
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
11–8
TNCK_THD
Transmitter NACK Threshold Value
Used to set the NACK threshold for the transmitter. Once the threshold number set by TNCK_THD has
been reached for the current byte being transmitted, the error flag TNTE in the TX_STATUS register will
Table continues on the next page...
Memory Map and Registers
K32 L2A Reference Manual, Rev. 2, 01/2020
496 NXP Semiconductors