NXP Semiconductors K32 L2A Series, Reference Manual, Page: 485 / 1379

Memory Map and Registers
The memory map comprises of 32-bit aligned registers which can be accessed via 8-bit,
16-bit, or 32-bit accesses. Write access to reserved locations will generate transfer error.
Read access to reserved locations will also generate transfer error and the read data bus
will show all 0s.
The module will not check for correctness of programmed values in the registers and
software must ensure that correct values are being written.
EMVSIM memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_E000 Version ID Register (EMVSIM0_VER_ID) 32 R 0000_0000h 21.5.1/486
4004_E004 Parameter Register (EMVSIM0_PARAM) 32 R 0000_0404h 21.5.2/486
4004_E008 Clock Configuration Register (EMVSIM0_CLKCFG) 32 R/W 0000_0000h 21.5.3/487
4004_E00C Baud Rate Divisor Register (EMVSIM0_DIVISOR) 32 R/W 0000_0174h 21.5.4/488
4004_E010 Control Register (EMVSIM0_CTRL) 32 R/W 0100_0006h 21.5.5/489
4004_E014 Interrupt Mask Register (EMVSIM0_INT_MASK) 32 R/W 0000_FFFFh 21.5.6/493
4004_E018 Receiver Threshold Register (EMVSIM0_RX_THD) 32 R/W 0000_0001h 21.5.7/496
4004_E01C Transmitter Threshold Register (EMVSIM0_TX_THD) 32 R/W 0000_000Fh 21.5.8/496
4004_E020 Receive Status Register (EMVSIM0_RX_STATUS) 32 w1c 0000_0000h 21.5.9/498
4004_E024 Transmitter Status Register (EMVSIM0_TX_STATUS) 32 w1c 0000_00B8h 21.5.10/501
4004_E028 Port Control and Status Register (EMVSIM0_PCSR) 32 R/W 0100_0000h 21.5.11/504
4004_E02C Receive Data Read Buffer (EMVSIM0_RX_BUF) 32 R 0000_0000h 21.5.12/506
4004_E030 Transmit Data Buffer (EMVSIM0_TX_BUF) 32
W
(always
reads 0)
0000_0000h 21.5.13/507
4004_E034
Transmitter Guard ETU Value Register
(EMVSIM0_TX_GETU)
32 R/W 0000_0000h 21.5.14/507
4004_E038 Character Wait Time Value Register (EMVSIM0_CWT_VAL) 32 R/W 0000_FFFFh 21.5.15/508
4004_E03C Block Wait Time Value Register (EMVSIM0_BWT_VAL) 32 R/W FFFF_FFFFh 21.5.16/508
4004_E040 Block Guard Time Value Register (EMVSIM0_BGT_VAL) 32 R/W 0000_0000h 21.5.17/509
4004_E044
General Purpose Counter 0 Timeout Value Register
(EMVSIM0_GPCNT0_VAL)
32 R/W 0000_FFFFh 21.5.18/509
4004_E048
General Purpose Counter 1 Timeout Value
(EMVSIM0_GPCNT1_VAL)
32 R/W 0000_FFFFh 21.5.19/510
21.5
Chapter 21 Smart Card Interface Module (EMV SIM)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 485