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TCD word 2 is defined as follows if:
• Minor loop mapping is enabled (CR[EMLM] = 1) and
• SMLOE = 0 and DMLOE = 0
If minor loop mapping is enabled and SMLOE or DMLOE is set, then refer to the
TCD_NBYTES_MLOFFYES register description. If minor loop mapping is disabled,
then refer to the TCD_NBYTES_MLNO register description.
Address: 4000_8000h base + 1008h (32d × i), where i=0d to 7d
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
W
Reset
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
* Notes:
x = Undefined at reset.
•
DMAx_TCDn_NBYTES_MLOFFNO field descriptions
Field
Description
31
SMLOE
Source Minor Loop Offset Enable
Selects whether the minor loop offset is applied to the source address upon minor loop completion.
0
The minor loop offset is not applied to the SADDR
1
The minor loop offset is applied to the SADDR
30
DMLOE
Destination Minor Loop Offset enable
Selects whether the minor loop offset is applied to the destination address upon minor loop completion.
0
The minor loop offset is not applied to the DADDR
1
The minor loop offset is applied to the DADDR
NBYTES
Minor Byte Transfer Count
Number of bytes to be transferred in each service request of the channel.
As a channel activates, the appropriate TCD contents load into the eDMA engine, and the appropriate
reads and writes perform until the minor byte transfer count has transferred. This is an indivisible operation
and cannot be halted. It can, however, be stalled by using the bandwidth control field, or via preemption.
After the minor count is exhausted, the SADDR and DADDR values are written back into the TCD
memory, the major iteration count is decremented and restored to the TCD memory. If the major iteration
count is completed, additional processing is performed.
Memory map/register definition
K32 L2A Reference Manual, Rev. 2, 01/2020
444
NXP Semiconductors
Summary of Contents for K32 L2A Series
Page 2: ...K32 L2A Reference Manual Rev 2 01 2020 2 NXP Semiconductors...
Page 42: ...K32 L2A Reference Manual Rev 2 01 2020 42 NXP Semiconductors...
Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
Page 174: ...Module Signal Description Tables K32 L2A Reference Manual Rev 2 01 2020 174 NXP Semiconductors...
Page 246: ...Application information K32 L2A Reference Manual Rev 2 01 2020 246 NXP Semiconductors...
Page 374: ...CMP Trigger Mode K32 L2A Reference Manual Rev 2 01 2020 374 NXP Semiconductors...
Page 384: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 384 NXP Semiconductors...
Page 592: ...Application Information K32 L2A Reference Manual Rev 2 01 2020 592 NXP Semiconductors...
Page 656: ...Functional Description K32 L2A Reference Manual Rev 2 01 2020 656 NXP Semiconductors...
Page 664: ...Functional Description K32 L2A Reference Manual Rev 2 01 2020 664 NXP Semiconductors...
Page 744: ...Functional description K32 L2A Reference Manual Rev 2 01 2020 744 NXP Semiconductors...
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Page 868: ...Integer square root K32 L2A Reference Manual Rev 2 01 2020 868 NXP Semiconductors...
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