NXP Semiconductors K32 L2A Series, Reference Manual, Page: 442 / 1379

20.3.24 TCD Transfer Attributes (DMAx_TCDn_ATTR)
Address: 4000_8000h base + 1006h (32d × i), where i=0d to 7d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
SMOD SSIZE DMOD DSIZE
Write
Reset x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset. •
DMAx_TCDn_ATTR field descriptions
Field Description
15–11
SMOD
Source Address Modulo
0 Source address modulo feature is disabled
≠0 This value defines a specific address range specified to be the value after SADDR + SOFF
calculation is performed on the original register value. Setting this field provides the ability to
implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue
should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value
for the queue, freezing the desired number of upper address bits. The value programmed into this
field specifies the number of lower address bits allowed to change. For a circular queue application,
the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD
function constraining the addresses to a 0-modulo-size range.
10–8
SSIZE
Source data transfer size
NOTE: Using a Reserved value causes a configuration error.
The eDMA defaults to privileged data access for all transactions.
000 8-bit
001 16-bit
010 32-bit
011 Reserved
100 16-byte
101 32-byte
110 Reserved
111 Reserved
7–3
DMOD
Destination Address Modulo
See the SMOD definition
DSIZE Destination data transfer size
See the SSIZE definition
Memory map/register definition
K32 L2A Reference Manual, Rev. 2, 01/2020
442 NXP Semiconductors