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USBx_ENDPTn field descriptions (continued)
Field
Description
0
Low-speed device connected to Host through a hub. PRE_PID will be generated as required.
1
Low-speed device directly connected. No hub, or no low-speed device attached.
6
RETRYDIS
This is a Host mode only bit and is present in the control register for endpoint 0 (ENDPT0) only. When set
this bit causes the host to not retry NAK'ed (Negative Acknowledgement) transactions. When a transaction
is NAKed, the BDT PID field is updated with the NAK PID, and the TOKEN_DNE interrupt is set. When
this bit is cleared, NAKed transactions are retried in hardware. This bit must be set when the host is
attempting to poll an interrupt endpoint.
5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4
EPCTLDIS
This bit, when set, disables control (SETUP) transfers. When cleared, control transfers are enabled. This
applies if and only if the EPRXEN and EPTXEN bits are also set. See
3
EPRXEN
This bit, when set, enables the endpoint for RX transfers. See
2
EPTXEN
This bit, when set, enables the endpoint for TX transfers. See
1
EPSTALL
When set, this bit indicates that the endpoint is stalled. This bit has priority over all other control bits in this
register, but it is only valid if EPTXEN=1 or EPRXEN=1. Any access to this endpoint causes the USB
Module to return a STALL handshake. After an endpoint is stalled it requires intervention from the Host
Controller.
0
EPHSHK
When set this bit enables an endpoint to perform handshaking during a transaction to this endpoint. This
bit is generally 1 unless the endpoint is Isochronous.
51.4.24 USB Control register (USBx_USBCTRL)
Address: 4005_5000h base + 100h offset = 4005_5100h
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
1
1
0
0
0
0
0
0
USBx_USBCTRL field descriptions
Field
Description
7
SUSP
Places the USB transceiver into the suspend state.
0
USB transceiver is not in suspend state.
1
USB transceiver is in suspend state.
6
PDE
Enables the weak pulldowns on the USB transceiver.
0
Weak pulldowns are disabled on D+ and D–.
1
Weak pulldowns are enabled on D+ and D–.
5
UARTCHLS
UART Signal Channel Select
This field is valid only when USB signals are selected to be used as UART signals.
Table continues on the next page...
Chapter 51 Universal Serial Bus Full Speed OTG Controller (USBFSOTG)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
1325
Summary of Contents for K32 L2A Series
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