NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1256 / 1379

48.1.3.3.35 TRNG0 Statistical Check Poker Count D and C (TRNG0_PK
RCNTDC)
48.1.3.3.35.1 Address
Register Offset
TRNG0_PKRCNTDC 400A5098h
48.1.3.3.35.2 Function
The TRNG0 Statistical Check Poker Count D and C Register is a read-only register used
to read the final Poker test counts of Dh and Ch patterns. The Poker Ch Count increments
each time a nibble of sample data is found to be Ch. The Poker Dh Count increments
each time a nibble of sample data is found to be Dh. Note that this register is readable
only if TRNG0_MCTL[PRGM] is 0, otherwise zeroes will be read.
48.1.3.3.35.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R PKR_D_CT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R PKR_C_CT
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
48.1.3.3.35.4 Fields
Field Function
31-16
PKR_D_CT
Poker Dh Count. Total number of nibbles of sample data which were found to be Dh. Requires
TRNG0_MCTL[PRGM] = 0.
15-0
PKR_C_CT
Poker Ch Count. Total number of nibbles of sample data which were found to be Ch. Requires
TRNG0_MCTL[PRGM] = 0.
Standalone True Random Number Generator (SA-TRNG).
K32 L2A Reference Manual, Rev. 2, 01/2020
1256 NXP Semiconductors