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48.1.3.3.30 TRNG0 Statistical Check Poker Count 3 and 2 (TRNG0_PK
RCNT32)
48.1.3.3.30.1 Address
Register
Offset
TRNG0_PKRCNT32
400A5084h
48.1.3.3.30.2 Function
The TRNG0 Statistical Check Poker Count 3 and 2 Register is a read-only register used
to read the final Poker test counts of 3h and 2h patterns. The Poker 2h Count increments
each time a nibble of sample data is found to be 2h. The Poker 3h Count increments each
time a nibble of sample data is found to be 3h. Note that this register is readable only if
TRNG0_MCTL[PRGM] is 0, otherwise zeroes will be read.
48.1.3.3.30.3 Diagram
Bits
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
48.1.3.3.30.4 Fields
Field
Function
31-16
PKR_3_CT
Poker 3h Count. Total number of nibbles of sample data which were found to be 3h. Requires
TRNG0_MCTL[PRGM] = 0.
15-0
PKR_2_CT
Poker 2h Count. Total number of nibbles of sample data which were found to be 2h. Requires
TRNG0_MCTL[PRGM] = 0.
Chapter 48 SA-TRNG Standalone
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors
1251
Summary of Contents for K32 L2A Series
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Page 122: ...Flash Memory Clock K32 L2A Reference Manual Rev 2 01 2020 122 NXP Semiconductors...
Page 158: ...Debug and security K32 L2A Reference Manual Rev 2 01 2020 158 NXP Semiconductors...
Page 174: ...Module Signal Description Tables K32 L2A Reference Manual Rev 2 01 2020 174 NXP Semiconductors...
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