NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1225 / 1379

48.1.3.3.8.1 Address
Register Offset Description
TRNG0_SBLIM 400A5014h Accessible at this address when
TRNG0_MCTL[PRGM] = 1]
48.1.3.3.8.2 Function
The TRNG0 Sparse Bit Limit Register is used when Von Neumann sampling is selected
during Entropy Generation. It defines the maximum number of consecutive Von
Neumann samples which may be discarded before an error is generated. Note that this
address (0x14) is used as TRNG0_SBLIM only if TRNG0_MCTL[PRGM] is 1. If
TRNG0_MCTL[PRGM] is 0, this address is used as TRNG0_TOTSAM readback
register.
48.1.3.3.8.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Reserved
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved SB_LIM
W
Reset
0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
48.1.3.3.8.4 Fields
Field Function
31-10
—
Reserved. Always 0.
9-0
SB_LIM
Sparse Bit Limit. During Von Neumann sampling (if enabled by TRNG0_MCTL[SAMP_MODE], samples
are discarded if two consecutive raw samples are both 0 or both 1. If this discarding occurs for a long
period of time, it indicates that there is insufficient Entropy. The Sparse Bit Limit defines the maximum
number of consecutive samples that may be discarded before an error is generated. This field is writable
only if TRNG0_MCTL[PRGM] bit is 1. This register is cleared to the default POR value by writing the
TRNG0_MCTL[RST_DEF] bit to 1. Note that if TRNG0_MCTL[PRGM] bit is 0, this register address is
used to read the Total Samples count in register TRNG0_TOTSAM, as defined in the following section.
Chapter 48 SA-TRNG Standalone
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 1225