NXP Semiconductors K32 L2A Series, Reference Manual, Page: 1224 / 1379

48.1.3.3.7.1 Address
Register Offset
TRNG0_SDCTL 400A5010h
48.1.3.3.7.2 Function
The TRNG0 Seed Control Register contains two fields. One field defines the length (in
system clocks) of each Entropy sample (ENT_DLY), and the other field indicates the
number of samples that will taken during each TRNG Entropy generation (SAMP_SIZE).
48.1.3.3.7.3 Diagram
Bits 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
ENT_DLY
W
Reset
0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
SAMP_SIZE
W
Reset
0 0 0 0 1 0 0 1 1 1 0 0 0 1 0 0
48.1.3.3.7.4 Fields
Field Function
31-16
ENT_DLY
Entropy Delay. Defines the length (in system clocks) of each Entropy sample taken. This field is writable
only if TRNG0_MCTL[PRGM] bit is 1. This field will read zeroes if TRNG0_MCTL[PRGM] = 0. This field is
cleared to its reset value at POR.
15-0
SAMP_SIZE
Sample Size. Defines the total number of Entropy samples that will be taken during Entropy generation.
This field is writable only if TRNG0_MCTL[PRGM] bit is 1. This field will read zeroes if
TRNG0_MCTL[PRGM] = 0. This field is cleared to the default POR value by writing the
TRNG0_MCTL[RST_DEF] bit to 1.
48.1.3.3.8 TRNG0 Sparse Bit Limit (TRNG0_SBLIM)
Standalone True Random Number Generator (SA-TRNG).
K32 L2A Reference Manual, Rev. 2, 01/2020
1224 NXP Semiconductors