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SIM_SDID field descriptions (continued)
Field
Description
1011
Custom pinout (WLCSP)
1100
169-pin
1101
Reserved
1110
256-pin
1111
Reserved
12.2.9 System Clock Gating Control Register 4 (SIM_SCGC4)
Address: 4004_7000h base + 1034h offset = 4004_8034h
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
W
Reset
1
1
1
1
0
0
0
0
0
0
0
1
0
0
0
0
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
W
Reset
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
SIM_SCGC4 field descriptions
Field
Description
31–28
Reserved
This field is reserved.
This read-only field is reserved and always has the value 1.
27–21
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
20
VREF
VREF Clock Gate Control
This bit controls the clock gate to the VREF module.
0
Clock disabled
1
Clock enabled
19
CMP
Comparator Clock Gate Control
This bit controls the clock gate to the comparator module.
0
Clock disabled
1
Clock enabled
18
USBOTG
USB Clock Gate Control
This bit controls the clock gate to the USB module.
Table continues on the next page...
Chapter 12 System Integration Module (SIM)
K22F Sub-Family Reference Manual, Rev. 4, 08/2016
NXP Semiconductors
277
Summary of Contents for K22F series
Page 2: ...K22F Sub Family Reference Manual Rev 4 08 2016 2 NXP Semiconductors...
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