System Considerations
MC1321x Reference Manual, Rev. 1.6
3-14
Freescale Semiconductor
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pin’s output buffer. See
Chapter 13, “MCU Parallel Input/Output”
for details.
Pullup enable bits for each input pin control whether on-chip pullup devices are enabled whenever the pin
is acting as an input even if it is being controlled by an on-chip peripheral module. When the PTA7–PTA4
pins are controlled by the KBI module and are configured for rising-edge/high-level sensitivity, the pullup
enable control bits enable pull-down devices rather than pullup devices. Similarly, when IRQ is configured
as the IRQ input and is set to detect rising edges, the pullup enable control bit enables a pull-down device
rather than a pullup device.
3.8.2
Modem GPIO Characteristics
The modem GPIO hardware consists of seven (7) signals total (GPIO1-GPIO7). Immediately after reset,
all the GPIO pins are configured as high-impedance general-purpose inputs. There are no internal pullup
devices on these pins.
NOTE
To avoid extra current drain from floating input pins, the reset initialization
routine in the application program should change the direction of unused
pins to outputs (programmed low) so the pins do not float. Outputs
programmed low is the preferred option for lowest power.
GPIO1 and GPIO2 share functionality with MCU GPIO. These pins are internally connected to two MCU
GPIO that can monitor modem status. The alternate functionality of the GPIO1-GPIO2 are controlled by
the applications program and use of these pins is described in
Chapter 9, “Modem Miscellaneous
The functionality of the modem GPIO is controlled by programming of the modem SPI registers via the
SPI interface. For information about controlling all these pins as general-purpose I/O pins, see
“Modem Miscellaneous Functions”
1
See this section for information about modules that share these pins.
Summary of Contents for freescale semiconductor MC13211
Page 40: ...MC1321x Pins and Connections MC1321x Reference Manual Rev 1 6 2 6 Freescale Semiconductor...
Page 166: ...Modem Modes of Operation MC1321x Reference Manual Rev 1 6 7 22 Freescale Semiconductor...
Page 172: ...Modem Interrupt Description MC1321x Reference Manual Rev 1 6 8 6 Freescale Semiconductor...
Page 186: ...MCU Modes of Operation MC1321x Reference Manual Rev 1 6 10 8 Freescale Semiconductor...
Page 208: ...MCU Memory MC1321x Reference Manual Rev 1 6 11 22 Freescale Semiconductor...
Page 244: ...MCU Parallel Input Output MC1321x Reference Manual Rev 1 6 13 20 Freescale Semiconductor...
Page 288: ...MCU Central Processor Unit CPU MC1321x Reference Manual Rev 1 6 15 20 Freescale Semiconductor...
Page 308: ...MCU Timer PWM TPM Module MC1321x Reference Manual Rev 1 6 17 16 Freescale Semiconductor...
Page 338: ...Inter Integrated Circuit IIC MC1321x Reference Manual Rev 1 6 19 14 Freescale Semiconductor...
Page 372: ...Development Support MC1321x Reference Manual Rev 1 6 21 20 Freescale Semiconductor...
