Inter-Integrated Circuit (IIC)
MC1321x Reference Manual, Rev. 1.6
19-4
Freescale Semiconductor
19.4.2
Register Descriptions
This section consists of the IIC register descriptions in address order. Refer to the direct-page register
summary in
for the absolute address assignments for all IIC registers. This
section refers to registers and control bits only by their names. A Freescale-provided equate or header file
is used to translate these names into the appropriate absolute addresses.
19.4.3
IIC Address Register (IIC1A)
19.4.4
IIC Frequency Divider Register (IIC1F)
Offset
7
6
5
4
3
2
1
0
R
ADDR
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-2. IIC Address Register (IIC1A)
Table 19-3. IIC1A Register Field Descriptions
Field
Description
7:1
ADDR[7:1]
IIC Address Register
— The ADDR contains the specific slave address to be used by the IIC module. This is
the address the module will respond to when addressed as a slave.
Offset
7
6
5
4
3
2
1
0
R
MULT
ICR
W
Reset
0
0
0
0
0
0
0
0
Figure 19-3. IIC Frequency Divider Register (IIC1F)
Summary of Contents for freescale semiconductor MC13211
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Page 338: ...Inter Integrated Circuit IIC MC1321x Reference Manual Rev 1 6 19 14 Freescale Semiconductor...
Page 372: ...Development Support MC1321x Reference Manual Rev 1 6 21 20 Freescale Semiconductor...
