MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
17-1
Chapter 17
Inter-Integrated Circuit (IIC)
17.1
Introduction
The inter-integrated circuit (IIC) provides a method of communication between a number of device. The
interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF. Support System Management Bus Specification (SMBus), version2
and filter registers.
NOTE
•
Use pin mux control registers from
Section 2.3, “Pin Mux Controls
” to
assign IIC signals to the MCF51CN128 package pins.
•
Most pin functions default to GPIO and must be software configured
before using IIC.