NXP Semiconductors freescale KV4 Series, Reference Manual

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ADC_CTRL2 field descriptions (continued)
Field Description
When CTRL2[SIMULT]=0, parallel scans in the A and B converters operate independently. The B
converter has its own independent set of the above controls (with a 1 suffix) which control its operation
and report its status. Each converter's scan continues until its sample list is exhausted (8 samples) or a
disabled sample IN ITS LIST is encountered. For looping parallel scan mode, each converter starts its
next iteration as soon as the previous iteration in that converter is complete and continues until the
CTRL*[STOP*] bit for that converter is asserted.
0 Parallel scans done independently
1 Parallel scans done simultaneously (default)
DIV0 Clock Divisor Select
The divider circuit generates the ADC clock by dividing the system clock:
• When DIV0 is 0, the divisor is 2.
• For all other DIV0 values, the divisor is 1 more than the decimal value of DIV0: (DIV0)Â +Â 1d.
A DIV0 value must be chosen so the ADC clock does not exceed the maximum frequency.
This clock is used by ADCA during all scans and is used by ADCB during sequential scan modes and
during parallel simultaneous scan modes.
34.4.3 ADC Zero Crossing Control 1 Register (ADC_ZXCTRL1)
Address: 4005_C000h base + 4h offset = 4005_C004h
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
ZCE7 ZCE6 ZCE5 ZCE4 ZCE3 ZCE2 ZCE1 ZCE0
Write
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADC_ZXCTRL1 field descriptions
Field Description
15–14
ZCE7
Zero crossing enable 7
00
Zero Crossing disabled
01 Zero Crossing enabled for positive to negative sign change
10
Zero Crossing enabled for negative to positive sign change
11 Zero Crossing enabled for any sign change
13–12
ZCE6
Zero crossing enable 6
00
Zero Crossing disabled
01 Zero Crossing enabled for positive to negative sign change
10
Zero Crossing enabled for negative to positive sign change
11 Zero Crossing enabled for any sign change
11–10
ZCE5
Zero crossing enable 5
00 Zero Crossing disabled
01
Zero Crossing enabled for positive to negative sign change
Table continues on the next page...
Memory Map and Registers
KV4x Reference Manual, Rev. 2, 02/2015
676
Preliminary
Freescale Semiconductor, Inc.