NXP Semiconductors 56F8013, User Manual

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56F8013 Demonstration Board User Guide, Rev. 0
2-4 Freescale Semiconductor
Preliminary
2.4 Debug Support
A JTAG connector, J1, on the 56F8013 Demonstration Board allows the connection of an
external Host Target Interface for downloading programs and working with the 56F8013’s
registers. This connector is used to communicate with an external Host Target Interface, which
passes information and data back and forth with a host processor running a debugger program.
Table 2-3
shows the pin-out for this connector.
2.5 External Interrupts
Two on-board push-button switches are provided for external interrupt generation, as shown in
Figure 2-2 . S1 allows the user to generate a hardware interrupt, IRQ #1, using GPIO Port B,
Bit 2. S2 allows the user to generate a hardware interrupt, IRQ #2, using GPIO Port B, Bit 3.
These two switches allow the user to generate interrupts for his user-specific programs.
Alternately, the user can use GPIO Port B, Bit 4 for IRQ #1. To accomplish this, cut the trace at
JP3 pins 1 and 2 and solder a jumper between JP3 pins 2 and 3. Also, the user can use GPIO
Port B, Bit 5 for IRQ #2. To accomplish this, cut the trace at JP4 pins 1 and 2 and solder a jumper
between JP4 pins 2 and 3.
Table 2-2. LED Control
Controlled by
User LED Color Signal
LED1 RED GPIO Port A, Bit 0
LED2 YELLOW GPIO Port A, Bit 1
LED3 GREEN GPIO Port A, Bit 2
LED4 RED GPIO Port A, Bit 3
LED5 YELLOW GPIO Port A, Bit 4
LED6 GREEN GPIO Port A, Bit 5