Timing
Generator
16-
bit
shift
registe
r
Common
Signal
Driver
Display
data
RAM
(
DDRAM
)
80
x
8
bits
40-
bit
latch
circuit
Segment
Signal
Driver
40-
bit
shift
registe
r
LCD
Drive
Voltage
Selector
CPG
Instruction
Register
(
IR
)
Instruction
Decoder
Reset
Circuit
MPU
Interface
Input
/
Output
Buffer
Address
Counter
Character
generator
ROM
(
CGROM
)
9,920
bits
Character
generator
RAM
(
CGRAM
)
64
bits
Cursor
and
Blink
controller
Data
Register
(
DR
)
Busy
Flag
Parallel
/
Serial
converter
and
Attribute
Circuit
GND
Vcc
V
1
V
2
V
3
V
4
V
5
OSC
1
OSC
2
CL
1
CL
2
M
D
COM
1
to
COM
16
SEG
1
to
SEG
40
RS
RW
E
DB
4
to
DB
7
DB
0
to
DB
3
-40-
Summary of Contents for CDN450
Page 5: ...SERVICE MANUAL Professional CD MP3 player CDN 450 Version 1 2...
Page 11: ...3 BLOCK DIAGRAM 5...
Page 12: ...4 PACKING VIEW 6...
Page 14: ...6 POINTTOPOINTWIRING DIAGRAM 8...
Page 15: ...7 EXPLODEDVIEW 9...
Page 28: ...11 PRINTED CIRCUIT BOARD DIAGRAM 11 1 MAIN LAYOUT 22...
Page 29: ...11 2 PANEL LAYOUT 23...
Page 30: ...11 3 POWER LAYOUT 24...
Page 43: ...12 14 MC9S08GBXX 37...
