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2471 & 2775 Main Board
5-Jun-01
Model 520A Service Manual
23
PRELIMINARY
low, during a Probe Off Patient alert, and during a system power up self-test. See
Calibrating the 20-Bit Analog-to-Digital Convertors
Figure 3.
Figure 1. Front-End Timing
The data sampling sequence consists of:
a. turn on the Red LED (RDLED*) and the Analog Sample line (ASAMP*)
c. sample the Red LED return signal (RDSMP*)
e. turn on the Infrared LED (IRLED*) and the Analog Sample line (ASAMP*)
f. sample the Infrared LED return signal (ISMP*)
h. turn off the Infrared LED, the Analog Sample line, and stop sampling
i. repeat the process starting at step a.
The Analog Sample (ASAMP*) line is used to nullify the effects of any ambient
light signals returning from the sensor. See
The IC42 INSIG* and SIGND* outputs are used in conjunction with the SC1 and
SC2 inputs. See
Calibrating the 20-Bit Analog-to-Digital Convertors
The IC42 pin 14 external sequencer (SYNC) line is equivalent to the PEEL’s D1
input. It provides a “sync” pulse to the pulse width modulator on the power supply
board in order to keep power supply switching spikes from interfering with data
sampling operations.
Sensor LED Drive Circuits
9.3.8
The VLED line voltage is derived from IC30 pin 8 which is controlled by the
Digital to Analog Converter IC29. (See sheet 4 on 2471 schematic, sheet 3 on 2775
schematic.) When address line A0 is high (IC29 pin 6) and both WR* (IC29 pin 16)
and DACCS* (IC29 pin 15) are low the D/A Converter is enabled. The data on lines
Summary of Contents for OXYPLETH 520A
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