PAMS Technical Documentation
Troubleshooting Instructions
NHM-8NX
Issue 1 05/02
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Nokia Corporation
Page 21
detector controls the charge pump to either charge or discharge the capacitors in the
loopfilter. By charging/discharging the loopfilter the control voltage to the VCO changes
and the LO-frequency will change. Therefore the PLL will make the LO-frequency stay
locked to the 26MHz VCXO frequency.
The loopfilter consists of the following components: C639-C641 and R618-R619.
The PLL is operating at twice the channel center frequency when transmitting or receiv-
ing in the PCN band. For the EGSM band the PLL is operating at 4-times the channel fre-
quency. Therefore divide-by-2 and divide-by-4 circuits are inserted between the PLL
output and LO-inputs to the PCN and EGSM mixers.
According to the table above the PLL must be able to cover the frequency range
3420.4MHz to 3839.2MHz.
Figure 3: Synthesiser
RF Key component placement
Table 1: Frequency plan
Frequency band
Channel
System Frequency Band (MHz)
PLL Frequency band (MHz)
EGSM
RX
975-1023
1 - 12
925.2 - 959.8
3700.8 - 3839.2
TX
880.2 – 914.8
3520.8 – 3659.2
PCN
RX
512 – 885
1805.2 – 1879.8
3610.4 – 3759.6
TX
1710.2 – 1784.8
3420.4 – 3569.6
64/
65
NDIV
ADIV
ϕ
Ch arg e
Pump
RDIV
1/2
1/4
CPOUT
1/2
1/4
PLL
loop
filter
26MHz
R
BEX
T
VXO
RF_EN
RF_CLK
RF_DATA
RESETX_Mjoel
1/2
Buffer
VB
EXT
LOCNT
REFCNT
Lock
Detect
2
XTALM
XTALP
REFOUT
REFO UT (26MHz)
VPLL
VDDCP
VDDPRE
VDDLO
VDDPLL
VDDXO
VR
EF
1
VDDDL
VDDDIG
VDDBBB
VBB (1.8V )
Digital
Control
2,7k
Vcp
su pply
filter
SEN
SE
RESETX
INPLO
INMLO
VVCO
VCO (G600)
PA vendor
indication
Rpa
Ref.
filter
3
RFBUSX
RFBUSDA
RFBUSCLK
Synth
supply
filter
Ref clk set
VCXO
su pply
filter
VR5
VR3
VR7
RFCONV_0(9)
VIO
VC
O
S
EN
SE
VR2
Main Bias
Circuit
Resistor Ext/R2H/R2
VDDRXBB
Sensor
BIST / Temp.
VD
D
T
X
18k : Hitachi
82k : RFMD
I/O
level
shift
B uf/
AGC
VCXO Bias
R2H/R2
V IO
SE LADDR
AFC/CAL
Control
RESETX
3
GENIO6
VD
D
R
X
B
B
2
2
2
2
2
2
2
To P CN
Modulator
To G SM
Modulator
To PCN RX
mixer
To GSM RX
mixer
Mjoelner
N600
VR1A
VCTRL