Customer Care / Service Operations / Training and Vendor Devolopment
Company Confidential Copyright © 2007 NOKIA Only for training purposes Version: 1.0 | 01.08.2007 | 6555 / b/c | Board version: 2ab_09a |
| Page (09)
RAP3GS, Combo, microSD, microphone
BT_UART_CTS
Keyb_Col1
SD_CMD
SD_DATA_DIR123
SD_Data2
Keyb_Row1
HALL_SENSOR
Keyb_Row4
Data7
DCX
SD_CMD_Dir
Data3
Keyb_Row5
SD_HOT_SWAP
Keyb_Row2
SD_Data_Dir
Data5
RDX
SD_Data3
Data0
SD_FBCLK
TE
Keyb_Col2
Keyb_Col3
SD_Data1
WRX
Keyb_Row3
SD_CLK
CSX
BT_UART_WAKEUP
Keyb_Col0
BT_UART_TX
SD_En
Data2
SD_WP
Bypass for memory
SPI_Clk
BT_RESETX
SD_Data4
BT_UART_RX
SPI_CS
Data6
Data4
Keyb_Col4
Keyb_Row0
BT_UART_RTS
Data1
100n
0
C2819
12
15
10
14
VPP
J2805
20
GND
1
9
9
7
VIO
1
3
3
100n
C2821
10
100n
C2820
C2809
100n
1
COMBO 32Mx16 NOR
16Mx16 DDR DRAM
D2801
K5G1257ATM-DF75
A1
9
GND
4
15
1
5
4k7
R2803
100n
C2818
U23
SDRLDQS
U3
19
V1
TOP_VCCnor0
W23
TOP_Vddq0
17
Y1
Y2
22
TOP_Vssq5
Y22
Y23
TOP_Vssq4
T1
21
16
T2
T21
4
T22
2
1
T23
TOP_Vpp
U1
TOP_VCCnor1
U2
U22
0
SDRCLK
7
M22
N1
FlsCSX
N23
5
20
P1
18
P2
P22
SDRDQML
P23
6
R23
3
K21
10
K23
L1
TOP_Vss5
TOP_Vss6
L2
8
L21
L22
SDRDQMU
SDRCLKX
L23
M2
23
M21
G22
14
G23
TOP_Vss2
H1
H2
TOP_Vss1
12
H23
11
J23
TOP_Vss3
K1
K2
TOP_Vss4
9
FlsWaitX
E2
SDRUDQS
E21
15
E23
TOP_Vccq0
F1
F2
FlsWEX
G1
TOP_Vccq1
G2
TOP_Vss0
13
B8
FlsADVX
C1
C2
0
TOP_Vssq2
C22
TOP_Vssq1
C23
C7
2
FlsRSTX
D1
FlsOEX
D2
D23
TOP_Vssq3
B18
TOP_Vddq4
B20
TOP_Vdd0
B22
TOP_Vssq0
8
B4
B5
9
1
B6
3
B7
4
AC3
AC5
TOP_VCCmm1
AC6
TOP_Vdd5
TOP_Vdd4
AC7
AC8
2
5
B11
B13
7
TOP_Vssd5
B14
B16
TOP_Vssd3
AC12
13
TOP_Vssd0
AC14
AC16
TOP_Vssd1
AC17
TOP_SDRAdres
AC18
8
AC20
SDRRASX
AC21
6
TOP_VCCmm0
5
AB22
4
AB3
TOP_/CEmm
AB5
TOP_INT
TOP_/CEd
AB6
AB7
3
AB9
1
AC10
0
AC11
14
AB12
12
AB14
11
AB15
SDRWEX
AB17
9
AB18
7
AB2
GenIO66
SDRCASX
1
2
B
A
0
2
B
A
A8
11
A9
12
FlsCS2X
AA1
AA2
24
AA22
TOP_Vssd2
TOP_Vdd3
AA23
AB10
10
SDRCKE
AB11
TOP_Vssd4
A15
A16
TOP_Vddq3
TOP_Vddq5
A17
A18
TOP_Vddq2
TOP_Vddq1
A19
A20
TOP_Vdd2
TOP_Vdd1
A21
A6
10
SDRDa
SDRAd
RAP3GS_V2.0E-PA
D2800
ExtAdDa
13
A10
A11
14
6
A12
15
A13
A14
FlsClk
0
8
1
VCORE
7
11
C2815
100n
10
3
J2804
GND
2
VIO
100n
C2822
GND
J2802
4
5
VIO
GND
GND
12
VPP
5
GenIO9
USBVP_FRX
SysClk
Y5
GenIO25
Y6
GenIO23
USBVO
VSSCORE6
Y8
GenIO18
Y9
CBusClk
GenIO44
Y15
GenIO39
Y16
VDDSIO4
GenIO34
Y18
GenIO13
Y19
GenIO8
Y20
Y21
USBRCV_FRX2
GenIO5
W20
GenIO4
W21
GenIO6
W22
USBFSE0_FTX
VDDCORE4
W4
PMARN
VDDSIO3
Y12
GenIO65
V20
GenIO33
GenIO1
V21
V22
GenIO3
GenIO7
V23
VSSCORE5
V3
USBOEX
W1
GenIO62
VSSDSP2
U20
GenIO2
U21
GenIO0
U4
GenIO69
U7
GenIO73
VDDCORE5
U8
GenIO19
U9
USBDSyncClk
T3
GenIO58
T4
T7
GenIO70
AudioClk
VDD2
CBusDa
VDDDSP1
VSSDSP1
GenIO43
U15
VDDDSP2
GenIO15
R21
GenIO32
R22
RX2
GenIO57
R4
R7
GenIO71
GenIO37
T17
VDDSIO5
GenIO64
VSSDSP3
GenIO38
P21
TXA
GenIO59
P4
GenIO60
P7
GenIO52
R1
VDDSIO6
GenIO56
R2
VDDDSP3
RX1
I2SSCLK
GenIO36
N21
N22
GenIO41
RFBusDa
TXReset
TXP
VDDCORE7
P17
VDDCORE3
L7
RFBusEn1X
I2SWS
VSSCORE9
M20
M23
GenIO42
M3
VSSATX
M4
VDDCORE2
VDDSIO1
N17
GenIO47
K20
VDD1
VDDATX
K3
TxIP
RxQP
GenIO46
L17
VSSCORE10
L20
VSSASUB
L3
TxIN
GenIO49
J20
GenIO48
J21
J22
GenIO68
RxIP
J4
VSSCORE3
RxQN
K17
GenIO67
VDDCORE8
H20
GenIO51
H21
GenIO16
TahvoInt
JTDO
RFClkN
VSSA
J1
VSSCORE2
VDDMCU1
RxIN
VSSMCU2
ACIRx
SIMIODa1
VSSMCU1
VDDA
RFClkP
VrefN
VrefP
VDDSIO7
EarDataR
JTrst
JTClk
Iref1
TXQP
TXQN
VDDCORE11
G13
G14
VSSCORE14
G15
GenIO72
VDDCORE1
E1
VDDARX
E20
GenIO54
E22
TMAct
EMU0
VSSARX
F20
GenIO17
F21
SIMIOCtrl1
D21
D22
VSSCORE11
APESleepX
VDDSIO10
JTDI
ETMPipeB1
SleepClk
JTMS
ETMPipe2
D13
VDDCORE9
ETMPkt5
SpecialIO3
D15
D16
SpecialIO2
GenIO61
D17
TxCClk
TxCDa
RetuInt
GenIO55
PURX
ETMPkt4
ETMPkt7
ETMSyncB
ETMPkt0
ETMSync
VDDCORE10
D11
VDDSIO9
C14
ETMPkt3
SIMClk1
C17
GenIO63
VDDCORE12
C18
SpecialIO1
C19
SpecialIO0
C20
VDDSIO8
VSSCORE1
C3
GenIO53
B21
SleepX
ETMClk
ETMPipe0
C11
VSSCORE13
RFBusClk
VDDMCU2
VSSCORE4
AC9
GenIO22
ETMPipe1
ETMPkt6
B15
VSSCORE12
ACITx
TxCDaCtrl
MicData
SMPSClk
VSSCORE8
AC19
GenIO26
AC4
GenIO50
AA9
I2SSD1
AB16
GenIO35
VDDCORE6
AB19
VDDSIO2
AB8
GenIO24
GenIO12
AA20
AA21
GenIO10
USBVM_Clk
GenIO28
AA4
AA5
GenIO27
GenIO29
AA6
GenIO21
AA7
AA8
GenIO20
AA11
PMARP
CBusEn1X
GenIO45
AA15
I2SSD2
AA17
GenIO40
GenIO14
AA18
AA19
GenIO11
ETMPipeB2
ETMPipeB0
ETMPkt2
ETMPkt1
EarDataL
VSSCORE7
6
D2800
RAP3GS_V2.0E-PA
2
14
0
100n
C2808
2
VDRAM
8
11
0
2
GND
7
R2802
4k7
GND
C2816
1
6
100n
100n
13
4
C2817
5
4
GND
2
6
0
7
8
2
3
VIO
VRFC
VRFC
3
1
GND
4k7
R2801
984_LDO_STBY
984_LDO_EN
GEN_CTRL_CMT(20:0)
GND
6
MESSI_CMT(25:0)
KEYB_CMT(20:0)
SCL
SDA
2k7
R2804
R2805
2k7
1
Y13
GenIO31
AA13
GenIO30
VIO
0
LPRF_CMT(7:0)
BT_WAKEUP
SPI_DAIN
SPI_DAO
SPI_CMT(3:0)
GPS_CMT(3:0)
984_CAM_REG_EN
984_CAM_PDN
BT_CLK_REQ
CSX_SUB
GPS_EN_RESET
GPS_INT_CLK
LCD_RESETX
TE_SUB
VPPLOCK
984_CAM_CLK
GPS_TIMESTAMP_RDY
Bypass for CPU
C2800
100n
1
GND
0
6
14
100n
C2814
GND
0
4
12
0
GND
R2800
10R
1
100n
C2807
5
2
5
GND
3
4
2
4
0
GND
0
GND
VCORE
2
3
1
7
R2815
1k0
J2801
11
VIO
1
1
4
2
1
C2823
1n0
J2803
100n
C2801
100n
2
3
C2803
8
5
W2803
W2800
3
15
4
VIO
1
1
VCORE
9
0
13
GND
GND
3
4
0
6
GND
2
GND
Y3
Y4
Y7
Y14
Y17
W3
Y10
Y11
V2
V4
W2
U17
U10
U11
U12
U13
U14
U16
R3
T20
P3
R17
R20
N2
N20
N3
N4
N7
P20
M1
M17
M7
K22
K4
K7
L4
J2
J3
J7
H22
H3
H4
H7
J17
G16
G17
G20
G21
G3
G4
G8
G9
H17
F23
F3
F4
G10
G11
G12
E3
E4
F22
D3
D4
D5
D6
D7
D8
D9
D14
D18
D19
D20
C4
C5
C6
C8
C9
D10
D12
C15
C16
C21
B3
B9
C10
C12
C13
B10
B12
B17
B19
AC13
AC15
AB13
AB4
AA3
AA12
AA14
AA16
A3
A4
A5
A7
AA10
C2806
100n
0
6
GND
C2810
100n
1
6
W2801
0
0
8
0
VCORE
5
100n
C2802
3
VCORE
5
8
10
9
1
0
1
2
1
2
16
7
W2802
C2804
100n
100n
C2812
100n
C2805
1
100n
C2811
2
0
2
100n
AudioCLK
3
5
C2813
1
5
4
7
6
0
J2800
PUSL(7:0)
DIG_AUDIO(5:0)
AuxMicData
DMIC_EN
PUEN
ACI(1:0)
RFCLK_I(1:0)
INT_SIM(5:0)
RFCTRL_I(8:0)
ETM(16:0)
RFCONV_I(11:0)
TXC(2:0)
CBUS(3:0)
USB_CMT(8:0)
JTAG(6:0)
PCM(3:0)
EMINT(1:0)
AuxMic_Data
Microphone
VDD
GND
Audio_Clk
C2109
220R/100MHz
L2109
C2108
820p
8=
GND
4=
VIO
N2100
74LVC2G66YZTR
1/2
56k
R2100
VIO
R2103
B2
B3
C1
C2
C3
GND
150R
Z2102
EMIF03-SIM02F3
R2
R3
R1
A2 dangle
A3
dangle
B1
GND
1
GND
2
L/R
3
VDD
OUT
4
CLK
5
6 GND
L2105
220R/100MHz
C2103
GND
31100-3008062
B2100
GND
100n
C2101
SMD_ESD_MIC
X2100
GND
GND
GND
R7873
0R
GND
74LVC2G66YZTR
N2100
VIO
4= GND
8=
2/2
47p
C2204
HCLKP
984_LDO_STBY
HDATAP
HDATAN
984_LDO_EN
CAM_EN
CAM_REG_EN
HCLKN
CAM_CLK
11
12
7
6
R3301
100R
2
8
4
5
R3300
100R
BTB_CAMERA(31:0)
10
1
3
PHONE:
HALL_SENSOR
OUTPUT
CLOSED:
ON(LOW)
1
VDD
2 Output
3
GND
GND
N2400
SH248CSP
GND
C2402
100n
VAUX
VIO
GND
C2401
100k
R2401
CLK
DAT2
CS/DAT3
DAT2
MMCDaDir1
MMCClk
MMCDet
MMCFb_clk
CS/DAT3
CLK
CMD
DAT0
MMCDa1
MMCLSShutDn
MMCCmd
VDD
DAT1
CMD
VDD
GND
MMCCmdDir
MMCDaDir
DAT0
DAT1
MMCDa2
MMCDa3
MMCDa0
MMC WP
13
9
3
VBAT
15
7
8
GND
GND
8
6
1
2
3
4
5
6
GND
X4800
2u2
100n
C4803
GND
C4800
11
GND
GND
GND
4
VSD
12
2
R4800
100k
VSD
10
14
7
CLK_B
D0_A
CMD_A
CD
CMD_B
D0_B
D1_A
fCLK_A
DIR_1-3
WP
D1_B
VBAT
D2_B
D3_A
VDDA
VDDB
D3_B
CLK_A
EN
GND
GND
C4801
N4800
LP3929TMEX-AACQ_NOPB
D2_A
CMD_DIR
DIR_0
GND
1u0
2u2
C4802
VIO
GND
MMC_CMT(16:0)
I2C(31:0)
AA10
