PAMS Technical Documentation
2 - Baseband System
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Clock
System clock for LPRF and phone
LPRFCLK
Lprfclk
buffer
BT102/
BT202
module
SysClk
Frequency
26
MHz
System clock
for the
Bluetooth
module.
-20
+20
ppm
Duty cycle
30
50
70
%
Signal amplitude
(26 MHz)
0.2
1.0
3.0
V
pp
Settling time
5,0
mS
VR3 on to stable
clock @ MCM
input
RFCLK
Mjoelner
REFOUT
UPP
RFCLK
Frequency
26
MHz
System clock
-20
+20
ppm
Duty cycle
40
60
%
Upp input req.
Biased in UPP
VR3 on to stable
clock @ UPP
input
Signal amplitude
0,3
1,32 Vpp
DC Offset
0,82
0,9
0,98
Vdc
Settling time
5,0
mS
RFCONV (9:0)
RF / BB analogue signals
RXIIP
RFCONV(0)
RXIINN
RFCONV(1)
RXQINP
RFCONV(2)
RXQINN
RFCONV(3)
Mjoelner
RXIP
Mjoelner
RXIM
Mjoelner
RXQP
Mjoelner
RXQM
UEM
RXIINP
UEM
RXIINN
UEM
RXQINP
UEM
RXQINN
Max input
Voltage swing
1.35
1.4
1.45 Vpp
Differential
complex RX BB
signal
Nominal Voltage
swing
V
Input DC level
1.3
1.35
1.4
Vdc
Signal frequency
67,7
kHz
Input BW
270,8
3
kHz
TXIOUTP
RFCONV(4)
TXIOUTN
RFCONV(5)
TXQOUTP
RFCONV(6)
TXQN
RFCONV(7)
UEM
TXIOUTP
UEM
TXIOUTN
UEM
TXQOUTP
UEM
TXQOUTN
Mjoelner
TXIP
Mjoelner
TXIN
Mjoelner
TXQP
Mjoelner
TXQN
Max Differential
output swing
(ref.
TxIN)
2.15
2.2
2.25
Vpp
Differential
complex TX
signal
(programable
voltage swing)
Input diff. Swing
(ref. TxIN)
1,0
Vpp
DC level
1.0
1.20
1.25
Vdc
Source
impedance
200
Ω
Signal frequency
67,7
kHz
RFAUXCONV(2:0)
RF / BB analogue control signals
Summary of Contents for 6310I - Cell Phone - GSM
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