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Electro Industries/GaugeTech
Doc # E134-7-15 V1.01
14-2
14.4: Normal Mode
14.4: Normal Mode
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The device is polling the inputs at 100 Hz (once every 10 msec), debouncing the inputs and
incrementing the Transition Accumulators for each channel as appropriate.
The inputs are represented by Channel 1 in the LSB through Channel 8 in the MSB of the low order
byte of the register.
14.4.1: Input States
14.4.1: Input States
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Register 04097 (0x01000)
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Input States is a 16-bit reading. Each bit is either a 1 or a 0.
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Inputs are assigned to the bits in the following way:
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Bit 0:
Channel 1
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Bit 1:
Channel 2
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Bit 2:
Channel 3
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Bit 3:
Channel 4
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Bit 4:
Channel 5
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Bit 5:
Channel 6
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Bit 6:
Channel 7
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Bit 7:
Channel 8
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Bit 8-15:
Not used.
A bit value of 1 indicates that the input is open; a bit value of 0 indicates that the input is closed.
Input states are debounced at a rate of 100 Hz, which means that minimum pulse widths should be
about 2 centiseconds wide.
For example,
1. If the input changes like the following at the sample rate, this is not regarded as a transition:
open-close-open (no transition)
close-open-close (no transition)
2. If the input changes like the following, this is regarded as one transition:
open-close-close-open (transition from open to close)
close-open-open-close (transition from close to open)
14.4.2: Channel Transitions
14.4.2: Channel Transitions
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Registers 04098-04113 (0x01001-0x01001)
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Transition Registers are accumulators that count the number of transitions an input makes. These
values are stored in EEPROM every two minutes whenever there is a change in the number.
Summary of Contents for I/O Module
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