Copyright © 2017 NEXCOM International Co., Ltd. All Rights Reserved.
46
NIFE 103 User Manual
Appendix C: GPI/O Programming Guide
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GPI/O (General Purpose Input/Output) pins are provided for custom system
design. This appendix provides definitions and its default setting for the ten
GPI/O pins in NIFE 103. The pin definition is shown in the following table:
Pin
GPI/O Mode
PowerOn
Default
Address
Pin
GPI/O Mode
PowerOn
Default
Address
1
VCC
-
-
2
GND
-
-
3
GPI
Low
588h (Bit22)
7
GPO
Low
Memory-FED0E168h
4
GPI
Low
588h (Bit23)
8
GPO
Low
Memory-FED0E158h
5
GPI
Low
588h (Bit24)
9
GPO
Low
Memory-FED0E188h
6
GPI
Low
588h (Bit25)
10
GPO
Low
Memory-FED0E198h
CN1 – GPI/O Connector
Pin
GPI/O Mode
PowerOn
Default
Address
C2
GPO
Low
SMBUS-EAh (Bit3)
C1
GPO
Low
SMBUS-EAh (Bit4)
LED3 – GPO LED
Control the GPO pin (7/8/9/10) level from Memory address FED0E168h/ FED0E158h/ FED0E188h/ FED0E198h.
Control the GPO (C2/C1) level from SMBUS EAh bit (3/4).
The bit is Set/Clear indicated output High/Low.
