N1_Hardware_User_Guide
Copyright © Neoway Technology Co., Ltd
32
Figure 4-6
Reference design of the main camera interface
Main camera
connector
1
2
3
4
5
6
7
8
9
10
11
12
13
17
15
14
16
18
20
22
24
19
21
23
25
27
26
0
Ω
VEXT_2P85V
CAM0_RST_N/BLSP3_SPI_CS_N
MIPI_CSI0_CLK_M
CAM_I2C_SCL
MIPI_CSI0_LANE1_M
1uF
1uF
0.1uF
2.2uF
1uF
CAM_I2C_SDA
CAM0_MCLK
DGND
DGND
MIPI_CSI0_LANE1_P
MIPI_CSI0_CLK_P
MIPI_CSI0_LANE0_M
MIPI_CSI0_LANE0_P
PWDN_VCM
VREG_L6_1P8
EXT_1V2_DVDD
VEXT_2V85_AVDD
4.3.2 Sub-Camera
Sub-camera uses one-lane MIPI_CSI differential signal, and supports 2MP cameras. Table 4-5 lists
sub-camera pins.
Table 4-5
Sub-camera pins
Pin
Signal
I/O
Function
Remarks
59
MIPI_CSI1_LANE0_M
DO
MIPI
60
MIPI_CSI1_LANE0_P
DO
MIPI
61
MIPI_CSI1_CLK_P
DO
MIPI
62
MIPI_CSI1_CLK_M
DO
MIPI
72
CAM1_RST_N
DO
RESET
73
CAM
_I2C_SCL
O
I2C clock
74
CAM
_I2C_SDA
IO
I2C data
65
CAM1_MCLK
O
Clock
71
CAM1_PWDN
O
Power off
/
VEXT_2P85V
O
LDO output
/
VEXT_CAM_1P8V
O
LDO output
VEXT_2P85V and VEXT_CAM_1P8V are powered by LDO. For how to select the proper model, see
4.3.1 Main Camera.
