3-4 Hardware Functional Overview
Cache Unit
Memory Management Unit
Bus Interface Unit
Instructions are executed in the Integer Unit pipeline and in the Floating Point Unit (FPU).
The Cache Unit stores the most recently used data and instructions and provides fast access
to this information for the Integer and Floating Point Units.
When external memory access is required, the physical address is calculated by the Memory
Management Unit and then passed to the Bus Interface Unit (BIU). The BIU provides the
interface between the external system board and the processor’s internal execution and
cache units.
SYSTEM LOGIC CONTROLLER
The System Logic Controller function for the notebook is implemented on the system board
using UMC 8890 Series Notebook Chipset. The UM8890 is an advanced 586 compatible
single chip specially designed for notebook computers and other portable computers. Aside
from supporting almost all 586-based CPUs, the UM8890 also integrates PMU, System
Controller, RTC and Peripheral Controller (206) into a single 208 QFP package.
Features Summary:
System -
Fully compatible with IBM PC/AT
Supports PCI Bus-Master mode
System Operation Voltage from 3V to 5.5V
Three programmable non cacheable regions
Flash ROM Boot block erase protection
Supports general purpose I/O
Hybrid Voltage
208 Pins QFP
Integration -
Built-in 206
Built-in 146818A
Built-in Memory Controller
