NEC V850E/PH2, User Manual

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Chapter 18 AFCAN Controller
User’s Manual U16580EE3V1UD00
18.5.4 Register bit configuration
Table 18-20: CAN0 message buffer registers
Address offset Register name Symbol R/W Access After reset
1-bit 8-bit 16-
bit
mx20
H
+ 0
H
CAN #n message data byte 01 register m CnMDATA01m R/W
√
Undefined
mx20
H
+ 0
H
CAN #n message data byte 0 register m CnMDATA0m
√
Undefined
mx20
H
+ 1
H
CAN #n message data byte 1 register m CnMDATA1m
√
Undefined
mx20
H
+ 2
H
CAN #n message data byte 23 register m CnMDATA23m
√
Undefined
mx20
H
+ 2
H
CAN #n message data byte 2 register m CnMDATA2m
√
Undefined
mx20
H
+ 3
H
CAN #n message data byte 3 register m CnMDATA3m
√
Undefined
mx20
H
+ 4
H
CAN #n message data byte 45 register m CnMDATA45m
√
Undefined
mx20
H
+ 4
H
CAN #n message data byte 4 register m CnMDATA4m
√
Undefined
mx20
H
+ 5
H
CAN #n message data byte 5 register m CnMDATA5m
√
Undefined
mx20
H
+ 6
H
CAN #n message data byte 67 register m CnMDATA67m
√
Undefined
mx20
H
+ 6
H
CAN #n message data byte 6 register m CnMDATA6m
√
Undefined
mx20
H
+ 7
H
CAN #n message data byte 7 register m CnMDATA7m
√
Undefined
mx20
H
+ 8
H
CAN #n message data length register m CnMDLCm
√
0000 xxxx
B
mx20
H
+ 9
H
CAN #n message configuration register m CnMCONFm
√
Undefined
mx20
H
+ A
H
CAN #n message identifier register m CnMIDLm
√
Undefined
mx20
H
+ C
H
CnMIDHm
√
Undefined
mx20
H
+ E
H
CAN #n message control register m CnMCTRLm
√
0x00 0000
0000 0000
B
Table 18-21: CAN global register bit configuration
Address
offset
Note
Symbol Bit 7/15 Bit 6/14 Bit 5/13 Bit 4/12 Bit 3/11 Bit 2/10 Bit 1/9 Bit 0/8
00H CnGMCTRL (W) 0 0 0 0 0 0 0 Clear GOM
01H 0 0 0 0 0 0 Set EFSD Set GOM
00H CnGMCTRL (R) 0 0 0 0 0 0 EFSD GOM
01H MBON 0 0 0 0 0 0 0
02H CnGMCS 0 0 0 0 CCP3 CCP2 CCP1 CCP0
06H CnGMABT (W) 0 0 0 0 0 0 0 Clear
ABTTRG
07H 0 0 0 0 0 0 Set
ABTCLR
Set
ABTTRG
06H CnGMABT (R) 0 0 0 0 0 0 ABTCLR ABTTRG
07H 0 0 0 0 0 0 0 0
08H CnGMABTD 0 0 0 0 ABTD3 ABTD2 ABTD1 ABTD0
Note: Base address: <CnRBaseAddr>