NEC startWARE-GHS-Ravin-E User Manual Download Page 35

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Chapter 5

Appendix

User’s Manual U17316EE1V0UM00

5.3 startWARE-GHS-Ravin-E Schematics

Figure 5-11:

Ravin-E

R35

R25

C21

1uf/63V/eia2220

TP9

TP/smd

C48

R52

10k

1uf/63V/eia2220

C20

2-F4

2-D5

100nf/16V/eia0603

C26

100nf/16V/eia0603

C67

47nf/50V/eia0603

2-D6,1-E6>2

2-D6,1-A2>3

2-F5

2-E6

R34

R36

AVDD

VCC3.3

R28

R33

OUT

VCC

C23

100nf/16V/eia0603

2-D6,1-E5

R31

2-F4

2200pF/25VDC/6A

FC5

GND

OE_NC

OUT1

OUT2

VCC

2-C5

R32

2-C7,1-B5>2

1-E4

socket_for_osz/14.318MHz

GND1

GND2

2-A3

2-C7,1-B6>2

10k

R18

NOT ass

C17

2-D5

10k

R22

2-D6

WRB

1-E5

2-C7,1-B5>2

2-D6,1-D1>3

10k

R53

VO2

VO3

VO4

VO5

VO6

VO7

VO8

VO9

VSYNCB

V13

WEB

C13

VID7

VID8

VID9

VO0

VO1

VO10

VO11

VO12

VO13

VO14

VO15

VID10

VID11

VID12

VID13

VID14

VID15

VID2

VID3

VID4

VID5

VID6

SDA

TCK

TDI

TDO

TMS

TRST

VCLK

VCSYNC

VID0

VID1

PCICLK

PCLK

PLLI

PLLREF

R13

RASB

A14

RDB

C12

RDSTSB

D12

RDY

RESETB

SCL

MD28

M17

MD29

V11

MD3

M15

MD30

P15

MD31

P10

MD4

R10

MD5

T10

MD6

MD7

U10

MD8

MD9

A13

K15

MD19

U11

MD2

K14

MD20

K18

MD21

K16

MD22

K17

MD23

L16

MD24

L17

MD25

L14

MD26

M18

MD27

M16

MD0

T11

MD1

MD10

MD11

MD12

MD13

MD14

MD15

J16

MD16

J17

MD17

MD18

J18

MA2

R18

MA3

R16

MA4

R17

MA5

T18

MA6

R15

MA7

U16

MA8

T16

MA9

MCLK

U13

T13

MCLKB

V14

MCSB

R11

IC3

IC4

E11

IDSEL

N15

MA0

P17

MA1

V17

MA10

T15

MA11

U15

MA12

V16

MA13

R14

MA14

P16

V15

V18

U18

P18

ENABL

FSC

HSYNCB

IC1

IC2

B15

DVDD2

J15

V12

N17

DQM3

B12

DRQB

DVDD1

L18

A18

A17

A10

G17

V10

U17

T12

DQM0

U12

DQM1

DQM2

N18

T14

N16

G16

C15

L15

P11

J14

E10

B13

CPUSEL

D14

CSB

CSYNCB

A12

DACKB

DCLK

DGND1

T17

B17

B16

AVDD1

AVDD2

E17

AVDD3

AVDD4

A15

BEB0

C14

BEB1

B14

BEB2

D13

BEB3

R12

CASB

CKE

U14

AD31

B10

AD4

C10

AD5

D10

AD6

AD7

AD8

AD9

AGND1

AGND2

D18

AGND3

AGND4

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

D11

AD3

AD30

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

A11

AD2

AD20

AD21

H16

H15

G18

H14

F18

G15

B11

AD0

AD1

C11

AD10

AD11

E15

A15

C18

A16

D17

A17

D16

A18

B18

A19

H18

C16

A20

C17

A21

D15

A22

A16

A23

H17

2-C7,1-B6

Ravin-E/uPD72255

IC4

F17

A10

F16

A11

E18

A12

F15

A13

A14

E16

VCC

47nf/50V/eia0603

2-C7,1-B5

GND

1-C6

2-C7,1-B6

SN74LVC04AD

IC12

R58

10k

R57

R27

R24

24.576MHz

2-D6,1-E5

2-D6,1-C2>2

R23

4.7k

2-C5

2-C7,1-D5

2-F4

2-D5,1-C1

2-C4

2-D6,1-D1>3

2-C4>2

R37

256Mbit/4Mx16x4/3.3V/uPD45256163G5-A80L

IC2

R29

2-C7,1-B5>2

R43

R56

10k

2-D6

2-D5

R54

10k

R20

R21

10k

2-C7,1-D5

10k

VCC4

2-D6

1-B2

2-D6,1-E6

2-C7,1-B5

2-C7,1-B6>2

R39

4.7k

GND2

GND3

GND4

GND5

GND6

GND7

GND8

VCC1

VCC2

VCC3

2B2

2B3

2B4

2B5

2B6

2B7

2B8

2DIR

2OE

GND1

1DIR

1OE

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2A8

2B1

1A6

1A7

1A8

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1B8

VCC5.0

3.3V/SN74ALVC164245PA

IC6

1A1

1A2

1A3

1A4

1A5

10k

R59

2-C4>2

3pins

JP3

VCC3.3

1uf/63V/eia2220

C22

100nf/16V/eia0603

C14

C55

100nf/16V/eia0603

C54

1nf/50V/eia0603

10uH/180mA

2-C5

2-C4>2

2-C7,1-D5

2-E6

VCC3.3

4.7k

R13

2-C5

10k

R55

R11

C16

NOT ass

R26

2-C7,1-D5

2-C6

2-E6

2-C7,1-B6>2

4.7k

R38

C12

100nf/16V/eia0603

2-C4>2

VCC3.3

100nf/16V/eia0603

C59

C15

100nf/16V/eia0603

AVDD2

VCC3.3

FC4

2200pF/25VDC/6A

GND

OUT

VCC
1

2-D5,1-E5

2-C4>2

2-C5

R12

4.7k

TP/smd

TP11

R42

R19

10k

33pf/50V/eia0603

10k

R16

R17

10k

2-C7,1-B6>2

2-D5,1-E6

2-C7,1-B6>2

2-D5,1-F6

1-E5

100nf/16V/eia0603

C53

C10

VCC5.0

33pf/50V/eia0603

2-C6

2-D6,1-D1>3

2-F6

100nf/16V/eia0603

VCC3.3

2-F6

2-A3

R41

1-B1

1-F5

2-D6,1-E6

JP2

3pins

R14

VCC3.3

2-D6,1-C2>2

2-D5,1-E5

1-B1

2-C7,1-B6>2

C58

100nf/16V/eia0603

2-E6

2200pF/25VDC/6A

FC1

GND

OUT

VCC

GND4

GND5

GND6

GND7

GND8

VCC1

VCC2

VCC3

VCC4

1-E5

2B3

2B4

2B5

2B6

2B7

2B8

2DIR

2OE

GND1

GND2

GND3

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2A8

2B1

2B2

1A8

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1B8

1DIR

1OE

3.3V/SN74ALVC164245PA

1A1

1A2

1A3

1A4

1A5

1A6

1A7

VCC5.0

IC7

4.7k

R40

C18

NOT ass

256Mbit/4Mx16x4/3.3V/uPD45256163G5-A80L

IC3

100nf/16V/eia0603

C50

2200pF/25VDC/6A

GND

OUT

VCC
1

100nf/16V/eia0603

C11

C13

100nf/16V/eia0603

2-F6

1-F5

2-A3

FC2

R30

2-C7,1-B6>2

2-A3

100nf/16V/eia0603

C24

2-D5>2

2-C7>3

2-E5

1-C1

2-F6

2-D5,1-E6

2-F6

C57

100nf/16V/eia0603

47nf/50V/eia0603

R10

2-D6

R62

33pf/50V/eia0603

C65

R61

VCC3.3S

C56

NOT ass

2pins

JP1

C52

100nf/16V/eia0603

2-D5

GND

OUT

VCC
1

100nf/16V/eia0603

C19

INDp

OUTA

OUTB

OUTC

OUTD

VCC

FC6

2200pF/25VDC/6A

MAX4222ESD/5V

IC5

GND

INAm

INAp

INBm

INBp

INCm

INCp

INDm

TP10

TP/LC-3-G/yellow

R15

10k

VCC2.5R

2-F5

VCC5.0

100nf/16V/eia0603

C66

VCC3.3R

C51

100nf/16V/eia0603

GND

Signal

Signal1

C49

100nf/16V/eia0603

47nf/50V/eia0603

CN9

Signal1

GND

VCC

CN8

GND

Signal

VSSA1

VSSA2

VSSDE1

VSSDE2

VSSDI

XTAL

XTALI

SN74ALS04BD

IC11

VDDDE2

VDDDI

VPO0

VPO1

VPO2

VPO3

VPO4

VPO5

VPO6

VPO7

VSSA0

TCK

TDI

TDO

TMS

TRST_n

VDDA0

VDDA1

VDDA2

VDDDA

VDDDE1

AI21

AI22

AI2D

AOUT

LLC

RTCO

RTS0

RTS1

SCL

SDA

SAF7113H

IC1

AGND

AI11

AI12

AI1D

2-C5

1-B3

2-D6

2-C5>2

VCC3.3

ENABLE

PCLK

DOTCLK

BLUE

PCICLK

VCSYNC

CPUSEL

2-C5>2

VO(2)

VO(1)

VO(0)

CKE

CSYNCB

HSYNCB

VSYNCB

VO(15)

VO(14)

VO(13)

VO(12)

VO(11)

VO(10)

VO(9)

VO(8)

GREEN

RED

FSC

PLLREF

PLLIN

MA(9)

MA(8)

MA(7)

MA(6)

MA(5)

MA(4)

MA(3)

MA(2)

DQM3

DQM2

DQM1

DQM0

MCSB

RASB

CASB

MWEB

MA(14)

VO(7)

VO(6)

VO(5)

VO(4)

VO(3)

MD(16)

MD(15)

MD(14)

MD(13)

MD(12)

MA(1)

MA(0)

MD(31)

MD(30)

MD(29)

MD(28)

MD(27)

MD(26)

MD(25)

MD(24)

MA(13)

MA(12)

MA(11)

MA(10)

MD(10)

MD(9)

MD(8)

MD(7)

MD(6)

MD(5)

MD(4)

MD(3)

MD(2)

MD(1)

MD(0)

MD(23)

MD(22)

MD(21)

MD(20)

MD(19)

MD(18)

MD(17)

RESET

MD(11)

VID(13)

VID(12)

VID(11)

VID(10)

VID(9)

VID(8)

VID(7)

VID(6)

VID(5)

VID(4)

VID(3)

VID(2)

VID(1)

VID(0)

VO(15:0)

PCLK1

HSYNCB_out

RESETB

RESET

DATA(31:0)

ADD(23:0)

VO(1)

VO(3)

VO(5)

VO(7)

VO(8)

VO(15:0)

VO(9)

VO(11)

VO(13)

VO(15)

VOX(15:0)

VOX(1)

VOX(3)

VOX(5)

VOX(7)

VOX(9)

VOX(11)

VOX(12)

VOX(14)

VID(15:0)

VID(15)

VID(14)

DOTCLKX

PLLREFX

CSYNCBX

VSYNCBX

ENABLEX

PCICLK

VID(3)

VID(4)

VID(5)

VID(6)

VID(7)

VID(0)

VID(1)

VID(2)

HSYNCB

VOX(0)

VOX(2)

VOX(4)

VOX(6)

VOX(8)

VOX(10)

VOX(13)

VOX(15)

FSC

HSYNCB

DOTCLK

PLLREF

CSYNCB

VSYNCB

ENABLE

FSCX

HSYNCBX

WRB

RDB

RDY

RDSTSB

DOTCLK

HSYNCB

VSYNCB

DOTCLK5

HSYNCB5

VSYNCB5

PCLK

HSYNCB_out

RED

GREEN

BLUE

ORED

OGREEN

OBLUE

ADD(7)

ADD(8)

ADD(9)

ADD(10)

ADD(11)

ADD(12)

ADD(13)

ADD(14)

ADD(15)

ADD(16)

ADD(17)

ADD(18)

ADD(19)

ADD(20)

ADD(21)

ADD(22)

ADD(23)

BEB0

BEB1

BEB2

BEB3

DATA(14)

DATA(15)

DATA(16)

DATA(17)

DATA(18)

DATA(19)

DATA(20)

DATA(21)

DATA(22)

DATA(23)

DATA(24)

DATA(25)

DATA(26)

DATA(27)

DATA(28)

DATA(29)

DATA(30)

DATA(31)

ADD(2)

ADD(3)

ADD(4)

ADD(5)

ADD(6)

VO(10)

VO(12)

VO(14)

MMCK

DROB

DAKB

DATA(0)

DATA(1)

DATA(2)

DATA(3)

DATA(4)

DATA(5)

DATA(6)

DATA(7)

DATA(8)

DATA(9)

DATA(10)

DATA(11)

DATA(12)

DATA(13)

VID(14)

VID(13)

VID(11)

VID(9)

LCS0B

LCS1B

CSB

TRST

TMS

TCK

TDO2

TDO1

RESETB

VCSYNC

VO(0)

VO(2)

VO(4)

VO(6)

MD(21)

MD(20)

MD(19)

MD(18)

MD(17)

MD(16)

CASB

RASB

MCSB

MCLKT

DQM2

DQM3

MWEB

CASB

RASB

MCSB

DQM0

DQM1

MD(31:0)

MA(14:0)

SCL

MA(4)

MA(5)

MA(2)

MA(3)

MA(0)

MA(1)

MD(15)

MD(14)

MD(13)

MD(12)

MD(11)

MD(10)

MD(9)

MD(8)

MD(7)

MD(6)

MD(5)

MD(4)

MD(3)

MD(2)

MD(1)

MD(0)

MD(31)

MD(30)

MD(29)

MD(28)

MD(27)

MD(26)

MD(25)

MD(24)

MD(23)

MD(22)

VID(12)

IDSEL

MA(12)

MWEB

MA(0)

MA(1)

MA(2)

MA(3)

MA(4)

MA(5)

MA(6)

MA(7)

MA(8)

MA(9)

MA(10)

MA(11)

MA(13)

MA(14)

MA(12)

MA(13)

MA(14)

MA(10)

MA(11)

MA(8)

MA(9)

MA(6)

MA(7)

RTCO

RTS0

SDA

TDI1

TDO1

TMS

3.3

VID(8)

TCK

RTS1

VCLK

VID(10)

Summary of Contents for startWARE-GHS-Ravin-E

Page 1: ...ser s Manual startWARE GHS Ravin E Ravin E Add on Board for startWARE GHS VR4131 and startWARE GHS VR4133 Document No U17316EE1V0UM00 Date Published September 2004 NEC Corporation 2004 Printed in Germany ...

Page 2: ...Note No connection for CMOS device inputs can be cause of malfunction If no connection is provided to the input pins it is possible that an internal input level may be generated due to noise etc hence causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using a pull up or pull down circuitry Each unused pin shoul...

Page 3: ...hereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features NEC Electronics products are classified into the following three quality grades Standard Special and Spec...

Page 4: ...ectronics America Inc Santa Clara California Tel 408 588 6000 800 366 9782 Fax 408 588 6130 800 729 9288 NEC Electronics Europe GmbH Duesseldorf Germany Tel 0211 65 03 1101 Fax 0211 65 03 1327 Sucursal en España Madrid Spain Tel 091 504 27 87 Fax 091 504 28 60 Succursale Française Vélizy Villacoublay France Tel 01 30 67 58 00 Fax 01 30 67 58 99 NEC Electronics Hong Kong Ltd Hong Kong Tel 2886 9318...

Page 5: ...re used as follows Weight in data notation Left is high order column right is low order column Active low notation xxx pin or signal name is over scored or xxx slash before signal name Memory map address High order at high stage and low order at low stage Note Explanation of Note in the text Caution Item deserving extra attention Remark Supplementary explanation to the text Numeric notation Binary...

Page 6: ...6 User s Manual U17316EE1V0UM00 ...

Page 7: ... Files to C Source Code 20 4 4 Demonstration Programs 21 4 4 1 Animation 21 4 4 2 Benchmarks 22 4 4 3 Datalogger 22 4 4 4 HW Test 22 Chapter 5 Appendix 23 5 1 Description of Connectors and Jumpers 24 5 1 1 Host Connector CN1 24 5 1 2 Video Connectors CN8 and CN9 27 5 1 3 VGA Connector CN12 28 5 1 4 Digital video output connector CN13 29 5 1 5 JTAG interface connector CN14 31 5 1 6 Disable Video Pr...

Page 8: ...8 User s Manual U17316EE1V0UM00 ...

Page 9: ...t 23 Figure 5 2 Host Connector CN1 24 Figure 5 3 Video Connectors CN8 and CN9 27 Figure 5 4 VGA Connector CN12 28 Figure 5 5 Digital video output connector CN13 29 Figure 5 6 JTAG interface connector CN14 31 Figure 5 7 Jumper JP1 32 Figure 5 8 Jumper JP2 32 Figure 5 9 Jumper JP3 33 Figure 5 10 Jumper JP4 33 Figure 5 11 Ravin E 35 Figure 5 12 Connectors 36 Figure 5 13 VME PCI Adapter 37 ...

Page 10: ...10 User s Manual U17316EE1V0UM00 ...

Page 11: ...ing conditions 18 Table 5 1 Technical Data of the Ravin E Board 23 Table 5 2 Host Connector CN1 24 Table 5 3 VGA Connector CN12 28 Table 5 4 Digital video output connector CN13 30 Table 5 5 JTAG interface connector CN14 31 Table 5 6 Jumper Settings with JP2 32 Table 5 7 Jumper Settings with JP3 33 ...

Page 12: ...12 User s Manual U17316EE1V0UM00 ...

Page 13: ...rtWARE GHS VR4131 User s Manual NEC Doc Number U16417EE1V0UM00 startWARE GHS VR4133 User s Manual NEC Doc Number U16916EE2V0UM00 Application Note Operation of Ravin E with V850 Devices NEC Doc Number S17194EE1V0AN00 Motherboard startWARE GHS Ravin E is an add on board designed for the startWARE GHS VR4131 33 boards Running the startWARE GHS Ravin E board with other mother boards will require a sui...

Page 14: ...14 User s Manual U17316EE1V0UM00 MEMO ...

Page 15: ... display connects through a 30 pin row connector The startWARE GHS Ravin E board has been designed as an add on board for the startWARE GHS VR4131 or startWARE GHS VR4133 boards It connects to these boards through a 96 pin male DIN connector CN1 which also carries the 5 V DC power supply 2 1 Summary of Features Ravin E µPD72255 graphics display controller 64 MB on board SDRAM frame buffer Enhanced...

Page 16: ...16 Chapter 2 Board Features User s Manual U17316EE1V0UM00 2 2 Picture of startWARE GHS Ravin E Board Figure 2 1 startWARE GHS Ravin E Board ...

Page 17: ...face The signal levels are 3 3 V LVTTL and the pinout is defined in Host Connector CN1 on page 24 of the appendix Ravin E is connected to two 256 Mbit SDRAMs each one of them being 16 bit wide These SDRAMs are primarily employed as frame buffer for the graphics as video buffer for the overlaid video and also to store bitmaps which can then be transferred quickly to the active screen location The S...

Page 18: ...SAF7113H is the first device in the scan chain while Ravin E is the second one 3 1 Power Consumption The startWARE GHS Ravin E board is supplied with a single 5 V DC operating voltage from the main board The internally required 3 3 V and 2 5 V are generated by linear voltage regulators on the Ravin E board The following table shows the operating currents that have been measured under typi cal oper...

Page 19: ...uired for libpng Both are third party software packages See http www libpng org for the latest sources rgl contains the Ravin Graphics Library and StartupVR contains startup code for MIPS devices and defines for the VR4131 All libraries can be built automatically by the build files in LibVR or LibV850 The libraries are supplied on the CD and ready to use but it may be useful to download the latest...

Page 20: ...ode That is exactly what the bin2c utility was made for The generated C Source code can be embedded into any project and be located to any required address bin2c was written for the conversion of png files but it does not perform any structural analysis and so it may be used with any file not just with binary png files bin2c inserts a pragma for the Green Hills compiler to emit the subsequent data...

Page 21: ...n PRE_DECODE is enabled then all frames are decompressed before the animation starts The decompressed data is stored in the heap space which must therefore be sufficiently large to hold all decoded files Each image of this example has a size of 240x240 pixels and the images use a colour palette which means that they use 8 bits per pixel The required heap space for a single frame is thus 57600 byte...

Page 22: ...It enables Ravin E to combine write transfers to subsequent memory addresses and to make burst accesses instead of single writes That has a very noticeable effect if data is usually written to subsequent addresses Writes to random addresses are slowed down however because every individual write access is delayed as it might have to be combined with the next write 4 4 3 Datalogger Datalogger is an ...

Page 23: ...3 page 29 Row connector male 2 15 pins Digital video output CN14 page 31 Row connector male 2 5 pins JTAG interface JP1 page 32 Row connector male 2 pins De select video processor JP2 page 32 Row connector male 3 pins Select one of two chip select inputs JP3 page 33 Row connector male 3 pins Select digital video interface voltage JP4 page 33 Row connector male 2 pins Enable DOTCLK output on CN12 D...

Page 24: ...iption a1 VCC50 in 5 V DC 10 power supply from motherboard b1 VCC50 in 5 V DC 10 power supply from motherboard c1 VCC50 in 5 V DC 10 power supply from motherboard a2 DATA30 in out data bus signal 30 b2 DATA31 in out data bus signal 31 c2 GND in ground a3 DATA27 in out data bus signal 27 b3 DATA28 in out data bus signal 28 c3 DATA29 in out data bus signal 29 a4 DATA24 in out data bus signal 24 b4 D...

Page 25: ... bus signal 4 c12 DATA5 in out data bus signal 5 a13 DATA0 in out data bus signal 0 b13 DATA1 in out data bus signal 1 c13 DATA2 in out data bus signal 2 a14 BEB1 in Byte Enable 1 active low b14 BEB0 in Byte Enable 0 active low c14 GND in ground a15 GND in ground b15 BEB3 in Byte Enable 3 active low c15 BEB2 in Byte Enable 2 active low a16 n c unconnected b16 n c unconnected c16 RESET in Reset sig...

Page 26: ...high ready high impedance while Ravin E is not selected c25 ADD2 in address bus signal 2 a26 LCS1B in Chip select 1 active low b26 LCS0B in Chip select 0 active low c26 GND in ground a27 RDB in CPU read signal active low b27 WRB in CPU write signal active low c27 GND in ground a28 n c unconnected b28 n c unconnected c28 n c unconnected a29 DAKB in Data acknowledge b29 DRQB out Data request c29 RDS...

Page 27: ...is 1 VPP but due to the auto matic gain adjustment within the video processor signal levels between 0 5 VPP and 1 4 VPP are acceptable Figure 5 3 Video Connectors CN8 and CN9 b32 IDSEL VSSEL in Initialization device select in PCI mode CPU interface select in asynchronous bus mode 0 VR41xx mode 1 BEBn inputs are write strobe signals c32 n c unconnected Table 5 2 Host Connector CN1 4 4 Number Name D...

Page 28: ...e 5 4 VGA Connector CN12 Table 5 3 VGA Connector CN12 Number Name Direction Description 1 Red out Red colour component 0 to 0 7 VPP 2 Green out Green colour component 0 to 0 7 VPP 3 Blue out Blue colour component 0 to 0 7 VPP 4 n c unconnected 5 GND Signal ground 6 n c unconnected 7 n c unconnected 8 n c unconnected 9 DOTCLK out DOTCLK if JP4 is set otherwise unconnected 10 n c unconnected 11 n c ...

Page 29: ...s Manual U17316EE1V0UM00 5 1 4 Digital video output connector CN13 CN13 carries the signals for a digital TFT display Its signal output voltages are selectable by JP3 to 3 3 V or 5 V Figure 5 5 Digital video output connector CN13 ...

Page 30: ...50 5 0 V power supply 5 VO0 out Blue 1 6 VO1 out Blue 2 7 VO2 out Blue 3 8 VO3 out Blue 4 9 VO4 out Blue 5 10 GND Ground 11 VO5 out Green 0 12 VO6 out Green 1 13 VO7 out Green 2 14 VO8 out Green 3 15 VO9 out Green 4 16 VO10 out Green 5 17 GND Ground 18 VO11 out Red 1 19 VO12 out Red 2 20 VO13 out Red 3 21 VO14 out Red 4 22 VO15 out Red 5 23 VCC33 3 3 V power supply 24 CSYNC out Ravin E CSYNC outpu...

Page 31: ...n the chain and Ravin E the second Figure 5 6 JTAG interface connector CN14 Table 5 5 JTAG interface connector CN14 Number Name Direction Description 1 TCK in JTAG clock 2 GND Signal ground 3 TDO out JTAG scan chain output 4 VCC33 3 3 V power supply 5 TMS in JTAG scan chain mode select 6 n c Not connected 7 TRST in JTAG scan chain tri state 8 n c Not connected 9 TDI in JTAG scan chain input 10 GND...

Page 32: ...lly not used Therefore the board is shipped without this jumper and thus the video processor is enabled by default Figure 5 7 Jumper JP1 5 1 7 Select CS input with JP2 The host connector CN1 carries two chip select signals which can be alternatively used to select Ravin E JP2 selects the active CS signal Figure 5 8 Jumper JP2 Note Board orientation as depicted in Figure 5 1 Table 5 6 Jumper Settin...

Page 33: ...h JP4 When a jumper is plugged onto JP4 then the 5 V TTL DOTCLK is connected to pin 9 of CN12 This sig nal is normally not used and therefore the board is shipped without JP4 Before plugging JP4 please make sure that your monitor can tolerate that signal There is probably no standard monitor which can use the DOTCLK We have implemented it primarily for experimenting with analogue TFT displays Figu...

Page 34: ...rame buffer of up to 64 MB The window that is visible from the host CPU can be moved over the total frame buffer by specifying the frame buffer start address in the HostCpuBaseAddr The start address is aligned to a 2 kB base address When the startWARE GHS Ravin E board is used together with the startWARE GHS VR4131 board then the following address mapping in the VR4131 I O address space applies JP...

Page 35: ...ia0603 100nf 16V eia0603 VCC3 3 2 F6 0 R5 0 R4 2 A3 3 75 R41 1 B1 1 F5 2 D6 1 E6 JP2 3pins 1 2 R14 33 VCC3 3 VCC3 3 2 D6 1 C2 2 2 D5 1 E5 1 B1 2 C7 1 B6 2 2 C7 1 B6 2 C58 100nf 16V eia0603 2 E6 2200pF 25VDC 6A FC1 3 GND 2 OUT 1 VCC GND4 21 GND5 28 34 GND6 GND7 39 GND8 45 VCC1 7 18 VCC2 31 VCC3 VCC4 42 1 E5 2B3 17 2B4 19 2B5 20 2B6 2B7 22 2B8 23 24 2DIR 25 2OE GND1 4 GND2 10 15 GND3 48 36 2A1 35 2A...

Page 36: ...1 b21 b22 b23 b24 b25 b26 b27 b28 b29 b3 b30 b12 b13 b14 b15 b16 b17 b18 b19 b2 b20 a31 a32 a4 a5 a6 a7 a8 a9 b1 b10 b11 a21 a22 a23 a24 a25 a26 a27 a28 a29 a3 a30 a12 a13 a14 a15 a16 a17 a18 a19 a2 a20 8 9 CN1 96pins rectangle male Erni STV C 96 M abc 434325 a1 a10 a11 26 27 28 29 3 30 4 5 6 7 16 17 18 19 2 20 21 22 23 24 25 30pins CN13 1 10 11 12 13 14 15 D6 12 D7 11 D8 10 D9 20 GND 1 VCC VCC3 3...

Page 37: ... 27 B23 AD 25 B24 3 3V B25 C BE 3 B26 AD 23 B27 GND B28 AD 21 B29 AD 19 B30 3 3V B31 AD 17 B32 C BE 2 B33 GND B34 IRDY B35 3 3V B36 DEVSEL B37 GND B38 LOCK B39 PERR B40 3 3V B41 SERR B42 3 3V B43 C BE 1 B44 AD 14 B45 GND B46 AD 12 B47 AD 10 B48 GND B49 GND B50 GND B51 AD 08 B52 AD 07 B53 3 3V B54 AD 05 B55 AD 03 B56 GND B57 AD 01 B58 3 3V B59 ACK64 B60 5V B61 5V B62 CON2 R1 R2 R3 T1 B32 B31 B30 B2...

Page 38: ...38 User s Manual U17316EE1V0UM00 MEMO ...

Page 39: ...ronics Taiwan Ltd Fax 02 2719 5951 Address North America NEC Electronics America Inc Corporate Communications Dept Fax 1 800 729 9288 1 408 588 6130 Europe NEC Electronics Europe GmbH Market Communication Dept Fax 49 0 211 6503 1344 Asian Nations except Philippines NEC Electronics Singapore Pte Ltd Fax 65 6250 3583 Japan NEC Semiconductor Technical Hotline I would like to report the following erro...

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