NL204153BM21-01/01A
DATA SHEET DOD-PD-1318 (4th edition)
12
4.5 CONNECTIONS AND FUNCTIONS FOR INTERFACE PINS
4.5.1 LCD panel signal processing board
CN1 socket (LCD module side): FI-WE41P-HFE (Japan Aviation Electronics Industry Limited (JAE))
Adaptable plug:
FI-W41S (Japan Aviation Electronics Industry Limited (JAE))
Pin No.
Symbol
Signal
Remarks
1
RSVD1
Reserved
Connect to signal ground.
2
N.C.
-
Keep this pin Open.
3
CS
Chip selection (Pull-up 25k
:
)
4
SCLK
Serial Clock (Pull-down 25k
:
)
5
SDAT
Serial Data (Pull-down 25k
:
)
LUT communication control signal
See "
4.12 TEN-bit LOOK UP TABLE FOP GAMMA
ADJUSTMENT
".
6
7
RSVD2
Reserved
Keep this pin Open.
See "
4.6 METHOD OF CONNECTION FOR LVDS
TRANSMITTER
".
BSEL0
BSEL1
Mode
8
BSEL0
Open
Open
A
Open
Low
B
Low
Open
C
9
BSEL1
Selection of LVDS data input map
(Pull-up 25k
:
)
Low
Low
A
10
RSVD2
Reserved
Keep this pin Open.
11
GND
Signal ground
Note1
12
DB3+
13
DB3-
Pixel data B3
LVDS differential data input
Note2
14
GND
Signal ground
Note1
15
CKB+
16
CKB-
Pixel clock B
LVDS differential clock input
Note2
17
GND
Signal ground
Note1
18
DB2+
19
DB2-
Pixel data B2
LVDS differential data input
Note2
20
GND
Signal ground
Note1
21
DB1+
22
DB1-
Pixel data B1
LVDS differential data input
Note2
23
GND
Signal ground
Note1
24
DB0+
25
DB0-
Pixel data B0
LVDS differential data input
Note2
26
GND
Signal ground
Note1
27
DA3+
28
DA3-
Pixel data A3
LVDS differential data input
Note2
29
GND
Signal ground
Note1
30
CKA+
31
CKA-
Pixel clock A
LVDS differential clock input
Note2
32
GND
Signal ground
Note1
33
DA2+
34
DA2-
Pixel data A2
LVDS differential data input
Note2
35
GND
Signal ground
Note1
36
DA1+
37
DA1-
Pixel data A1
LVDS differential data input
Note2
38
GND
Signal ground
Note1
39
DA0+
40
DA0-
Pixel data A0
LVDS differential data input
Note2
41
GND
Signal ground
Note1
Note1: All GND terminals should be used without any non-connected lines.
Note2: Twist pair wires with 100
:
(Characteristic impedance) should be used between LCD panel signal
processing board and LVDS transmitter.
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